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ILC7080AIM5-285 查看數據表(PDF) - Impala Linear Corporation

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产品描述 (功能)
生产厂家
ILC7080AIM5-285
Impala-Linear
Impala Linear Corporation Impala-Linear
ILC7080AIM5-285 Datasheet PDF : 16 Pages
1 2 3 4 5 6 7 8 9 10 Next Last
50/100mA SOT-23 CMOS RF LDO™ Regulators
5
4
12 3
Figure 8: Recommended application circuit schematic
Figure 9: Recommended application circuit layout
(not drawn to scale). Note: ground plane is bottom layer
of PCB and connects to top layer ground connections
through vias
Evaluation Board Parts List For Printed Circuit Board Shown Above
Label
U1
J1
CIN
CNOISE
COUT
Part Number
ILC7081AIM5-30
69190-405
GRM40 Y5V 105Z16
ECU-V1H103KBV
GRM42-
6X5R475K10
Manufacturer
Impala Linear
Berg
muRata
Panasonic
muRata
Description
100mA RF LDO™
Connector, four position header
Ceramic capacitor, 1µF, 16V, SMT
(size 0805)
Ceramic Capacitor, 0.01µF, 16V,
SMT (size 0603)
Ceramic Capacitor, 4.7µF, 16V, SMT
(size 1206)
Grounding Recommendations
1. Connect CIN between VIN of the ILC7080/81 and the
“GROUND PLANE”.
2. Keep the ground side of COUT and CNOISE connected to
the “LOCAL GROUND” and not directly to the
“GROUND PLANE”.
3. On multilayer boards use component side copper for
grounding around the ILC7080/81 and connect back to a
“GROUND PLANE” using vias.
4. If using a DC-DC converter in your design, use a star
grounding system with separate traces for the power
ground and the control signals. The star should radiate
from where the power supply enters the PCB.
Layout Considerations
1. Place all RF LDO related components; ILC7080/81,
input capacitor CIN, noise bypass capacitor CNOISE and
output capacitor COUT as close together as possible.
2. Keep the output capacitor COUT as close to the
ILC7080/81 as possible with very short traces to the
VOUT and GND pins.
3. The traces for the related components; ILC7080/81,
input capacitor CIN, noise bypass capacitor CNOISE and
output capacitor COUT can be run with minimum trace
widths close to the LDO.
4. Maintain a separate “LOCAL GROUND” remote from
the “GROUND PLANE” to ensure a quiet ground near
the LDO.
Figure 9 shows how this circuit can be translated into a
PCB layout.
Impala Linear Corporation
ILC7080/81 1.1
(408) 574-3939 www.impalalinear.com
Sept. 1998 9

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