UC2843BG-D08-R 查看數據表（PDF） - Unisonic Technologies
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UC2843BG-D08-R Datasheet PDF : 9 Pages
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UC2843B
LINEAR INTEGRATED CIRCUIT
APPLICATION INFORMATION (Cont.)
Open-Loop Laboratory Test Fixture
In the open-loop laboratory test fixture, high peak currents and loads need grounding techniques. The transistor
and 5-kΩ potentiometer sample the oscillator waveform, applying an adjustable ramp to the ISENSE terminal. Timing
and bypass capacitors should be connected closely to the GND terminal in a single-point ground.
Q1
5kΩ
ISENSE
Adjust
4.7kΩ
RT 1kΩ
EA
100kΩ
COMP
VREF
Adjust
4.7kΩ
VFB
VCC
UTC
UC2843B
ISENSE
OUTPUT
RT/CT
GND
A
0.1µ F
0.1µ F
VCC
1KΩ/1W
OUTPUT
GND
CT
Shutdown Technique
The PWM controller can be shut down through two methods: the one is raising voltage (above 1 V) at ISENSE, the
other is pulling the COMP terminal below a voltage two diode drops above ground. Either method can leave the
output of the PWM comparator high (refer to block diagram). To reset the PWM latch is dominant so the output can
stay low in the case of the next clock cycle is coming and the COMP or ISENSE terminal is removed beyond this
shutdown condition. For example, an externally-latched shutdown can be accomplished by adding an SCR reset by
cycling VCC below the lower UVLO threshold. So the reference turns off then allows the SCR to reset at this
condition.
1kΩ
VREF
330Ω
ISENSE
500Ω
To Current-Sense
Resistor
Shutdown
COMP
UNISONIC TECHNOLOGIES CO., LTD
www.unisonic.com.tw
7 of 9
QW-R103-048.E
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