V82658J04SXTG-A1 查看數據表（PDF） - Mosel Vitelic Corporation

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V82658J04SXTG-A1

2.5 VOLT 8M x 64 HIGH PERFORMANCE UNBUFFERED DDR SDRAM MODULE

Mosel Vitelic Corporation  

MOSEL VITELIC

V82658J04S

AC Operating Test Conditions (TA = 0 to 70°C, Voltage referenced to VSS = 0V)

Parameter

Value

Reference Voltage

Termination Voltage

AC Input High Level Voltage (VIH, min)

AC Input Low Level Voltage (VIL, max)

Input Timing Measurement Reference Level Voltage

Output Timing Measurement Reference Level Voltage

Input Signal maximum peak swing

VDDQ x 0.5

VDDQ x 0.5

VREF + 0.31

VREF - 0.31

VREF

VTT

1.5

Input minimum Signal Slew Rate

1

Termination Resistor (RT)

50

Series Resistor (RS)

25

Output Load Capacitance for Access Time Measurement (CL)

30

Unit

V

V

V

V

V

V

V

V/ns

¾

¾

pF

Output

Vtt=0.5*VDDQ

RT=50Ω

Z0=50Ω

CLOAD=30pF

VREF

=0.5*VDDQ

Output Load Circuit (SSTL_2)

Input/Output Capacitance

(VDD = 2.5V, VDDQ = 2.5V, TA = 25°C, f = 1MHz)

Parameter

Symbol

Min

Input capacitance (A0 ~ A11, BA0 ~ BA1, RAS, CAS, WE)

CIN1

29

Input capacitance (CKE0)

CIN2

29

Input capacitance (CS0)

CIN3

26

Input capacitance (CLK1, CLK2)

CIN4

30

Data & DQS input/output capacitance (DQ0~DQ63)

COUT

8

Input capacitance (DM0~DM8)

CIN5

8

Max

34

34

30

32

9

9

Unit

pF

pF

pF

pF

pF

pF

V82658J04S Rev. 1.3 March 2002

7

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