MC14490 查看數據表（PDF） - Motorola => Freescale

零件编号

产品描述 (功能)

生产厂家

MC14490

Hex Contact Bounce Eliminator

Motorola => Freescale 

TYPICAL APPLICATIONS

ASYMMETRICAL TIMING

In applications where different leading and trailing edge

delays are required (such as a fast attack/slow release

timer.) Clocks of different frequencies can be gated into the

MC14490 as shown in Figure 6. In order to produce a slow

attack/fast release circuit leads A and B should be inter-

changed. The clock out lead can then be used to feed clock

signals to the other MC14490 packages where the asym-

metrical input/output timing is required.

IN

OUT

MC14490

OSCin

OSCout

MC14011B

MULTIPLE TIMING SIGNALS

As shown in Figure 8, the Bounce Eliminator circuits can

be connected in series. In this configuration each output is

delayed by four clock periods relative to its respective input.

This configuration may be used to generate multiple timing

signals such as a delay line, for programming other timing

operations.

One application of the above is shown in Figure 9, where it

is required to have a single pulse output for a single opera-

tion (make) of the push button or relay contact. This only

requires the series connection of two Bounce Eliminator cir-

cuits, one inverter, and one NOR gate in order to generate

the signal AB as shown in Figures 9 and 10. The signal AB is

four clock periods in length. If the inverter is switched to the A

output, the pulse AB will be generated upon release or break

of the contact. With the use of a few additional parts many

different pulses and waveshapes may be generated.

A

B

EXTERNAL

CLOCK

fC ÷ N

fC/N

Figure 6. Fast Attack/Slow Release Circuit

LATCHED OUTPUT

The contents of the Bounce Eliminator can be latched by

using several extra gates as shown in Figure 7. If the latch

lead is high the clock will be stopped when the output goes

low. This will hold the output low even though the input has

returned to the high state. Any time the clock is stopped the

outputs will be representative of the input signal four clock

periods earlier.

IN

OUT

MC14490

OSCin

OSCout

CLOCK

MC14011B

LATCH = 1

UNLATCH = 0

Figure 7. Latched Output Circuit

1

15

B.E. 1

Aout

Ain

14

B.E. 2

Bin

2

Bout

3

13

B.E. 3

Cout

Cin

12

B.E. 4

Din

4

Dout

5

B.E. 5

Ein

10

B.E. 6

Fin

11

Eout

6

Fout

7

OSCin

CLOCK

9

OSCout

Figure 8. Multiple Timing Circuit Connections

MC14490

302

MOTOROLA CMOS LOGIC DATA

Share Link: