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SL74HC174D 查看數據表(PDF) - System Logic Semiconductor

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SL74HC174D Datasheet PDF : 5 Pages
1 2 3 4 5
SL74HC174
Hex D Flip-Flop with
Common Clock and Reset
High-Performance Silicon-Gate CMOS
The SL74HC174 is identical in pinout to the LS/ALS174. The device
inputs are compatible with standard CMOS outputs; with pullup
resistors, they are compatible with LS/ALSTTL outputs.
This device consists of six D flip-flops with common Clock and
Reset inputs. Each flip-flop is loaded with a low-to-high transition of
the Clock input. Reset is asynchronous and active-low.
Outputs Directly Interface to CMOS, NMOS, and TTL
Operating Voltage Range: 2.0 to 6.0 V
Low Input Current: 1.0 µA
High Noise Immunity Characteristic of CMOS Devices
ORDERING INFORMATION
SL74HC174N Plastic
SL74HC174D SOIC
TA = -55° to 125° C for all packages
LOGIC DIAGRAM
PIN ASSIGNMENT
PIN 16=VCC
PIN 8 = GND
SLS
System Logic
Semiconductor
FUNCTION TABLE
Inputs
Output
Reset Clock
D
Q
L
X
X
L
H
H
H
H
L
L
H
L
X no change
H
X no change
X = Don’t care

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