MM74C901 查看數據表（PDF） - Fairchild Semiconductor
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MM74C901 Datasheet PDF : 6 Pages
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October 1987
Revised January 1999
MM74C901 • MM74C902
Hex Inverting TTL Buffer •
Hex Non-Inverting TTL Buffer
General Description
The MM74C901 and MM74C902 hex buffers employ com-
plementary MOS to achieve wide supply operating range,
low power consumption, and high noise immunity. These
buffers provide direct interface from PMOS into CMOS or
TTL and direct interface from CMOS to TTL or CMOS
operating at a reduced VCC supply.
Features
s Wide supply voltage range: 3.0V to 15V
s Guaranteed noise margin: 1.0V
s High noise immunity: 0.45 VCC (typ.)
s TTL compatibility: Fan out of 2 driving standard TTL
Ordering Code:
Order Number Package Number
Package Description
MM74C901M
M14A
14-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-120, 0.150” Narrow
MM74C901N
N14A
14-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-011, 0.300” Wide
MM74C902M
M14A
14-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-120, 0.150” Narrow
MM74C902N
N14A
14-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-011, 0.300” Wide
Devices also available in Tape and Reel. Specify by appending the suffix letter “X” to the ordering code.
Connection Diagrams
Pin Assignments for DIP and SOIC
MM74C901
MM74C902
Top View
Logic Diagrams
MM74C901
CMOS to TTL Inverting Buffer
Top View
MM74C902
CMOS to TTL Buffer
© 1999 Fairchild Semiconductor Corporation DS005909.prf
www.fairchildsemi.com
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