SSM2164 查看數據表（PDF） - Analog Devices

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SSM2164

Low Cost Quad Voltage Controlled Amplifier

Analog Devices 

SSM2164

If additional SSM2164s are added, the 100 pF capacitor may

VC

30k

need to be increased to ensure stability of the output amplifier.

Most op amps are sensitive to capacitance on their inverting

500

IIN

560pF

VCA1

IIOUT

inputs. The capacitance forms a pole with the feedback resistor,

which reduces the high frequency phase margin. As more

SSM2164’s are added to the mixer circuit, their output capaci-

VC

30k

100pF

tance and the parasitic trace capacitance add, increasing the

overall input capacitance. Increasing the feedback capacitor will

IIOUT

maintain the stability of the output amplifier.

500

VCA2

30kΩ

IIN

560pF

Digital Control of the SSM2164

OP176

VOUT One option for controlling the gain and attenuation of the

VC

SSM2164 is to use a voltage output digital-to-analog converter

30k

such as the DAC8426 (Figure 26), whose 0 V to +10 V output

500

560pF

30k

E 500

560pF

IIOUT

IIN

VCA3

VC

IIOUT

VCA4

IIN

POWER SUPPLY

AND BIASING CIRCUITRY

FROM ADDITIONAL SSM2164s

FOR > 4 CHANNELS

T V+ GND V– MODE

E Figure 25. Four-Channel Mixer (4 to 1)

controls the SSM2164’s attenuation from 0 dB to –100 dB. Its

simple 8-bit parallel interface can easily be connected to a

microcontroller or microprocessor in any digitally controlled

system. The voltage output configuration of the DAC8426

provides a low impedance drive to the SSM2164 so the attenua-

tion can be controlled accurately. The 8-bit resolution of the

DAC and its full-scale voltage of +10 V gives an output of

3.9 mV/bit. Since the SSM2164 has a –33 mV/dB gain con-

stant, the overall control law is 0.12 dB/bit or approximately

8 bits/dB. The input and output configuration for the

SSM2164 is the same as for the basic VCA circuit shown

earlier. The 4-to-1 mixer configuration could also be used.

L+15V

O DAC8426

10V

REFERENCE

VREFOUT +10V

4

VDD

18

LATCH A

DAC A

S 7

MSB

LSB 14

DATA BUS

LATCH B

LATCH C

DAC B

DAC C

B WR 15

A1 16

O A0 17

LOGIC

CONTROL

LATCH D

DAC D

VC

IIN

VC

2

VOUTA

IIN

1

VOUTB

VC

20

VOUTC

IIN

19

VOUTD

VC

VCA1

IIOUT

VCA2

IIOUT

VCA3

IIOUT

3

5

6

IIOUT

VCA4

IIN

VSS

AGND

DGND

POWER SUPPLY

AND BIASING CIRCUITRY

Figure 26. Digital Control of VCA Gain

V+

GND V– MODE

+15V

–15V

REV. 0

–9–

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