V96BMC 查看數據表（PDF） - QuickLogic Corporation

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V96BMC

HIGH PERFORMANCE BURST DRAM CONTROLLER FOR i960Cx/Hx/Jx® PROCESSORS

QuickLogic Corporation 

V96BMC Rev.D

Table 8: DC Operating Specifications Vcc3=3.3 Volt and Vcc=5 Volt

Symbol

Description

Conditions

Min

Max Units

VOL Low level output voltage

VIN = Vcc3

IOL = 12 mA

0.4

V

VOH High level output voltage

VIN = Vcc3

IOL = -12 mA

2.4

V

IOZL

Low level float input

leakage

VIN = Vcc2

VO = GND

-10

µA

IOZH

High level float input

leakage

VIN = VIL or VIH

VO =4.46V

10

µA

ICC

Maximum supply current

(max)

Continuous simple access

Continuous burst access

140

40

mA

4.0 AC Specifications

Table 9: AC Test Conditions

Symbol

Vcc3/Vcc

VCC3

VIN

COUT

Parameter

Supply voltage

Supply voltage when 3.3 Volt DRAM inter-

face operation1 (Vcc is still as above)

Input low and high voltages

Capacitive load on output and I/O pins

Limits

4.75 to 5.25

3.0 to 3.6

0.4 and 4.25

50

Units

V

V

V

pF

1. For 3.3 Volt DRAM intreface operation.( See also note 8 table 11)

Table 10: Capacitive Derating for Output and I/O Pins

Output Drive Limit

12 mA

12 mA

Supply voltage

Vcc=5 Volt, Vcc3=3.3 Volt

Vcc=5 Volt, Vcc3=5 Volt

Derating

0.06 ns/pF for loads > 50 pF

0.04 ns/pF for loads > 50 pF

10

V96BMC Rev D Data Sheet Rev 3.2

Copyright © 1998, V3 Semiconductor Inc.

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