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MCM69L817ZP6R 查看數據表(PDF) - Signal Processing Technologies

零件编号
产品描述 (功能)
生产厂家
MCM69L817ZP6R
Sipex
Signal Processing Technologies Sipex
MCM69L817ZP6R Datasheet PDF : 12 Pages
1 2 3 4 5 6 7 8 9 10 Next Last
TIMING CHARACTERISTICS
(Typical
@
25°C
with
V
DD
=
+5V,
unless
otherwise
noted)
PARAMETER
Thoughput Time (tTP=tA+tC)
Acquisition Time (tA) (2 SCLK Periods)
Conversion Time (tC) (31 SCLK Periods)
SCLK Low Pulse Width (tSKL)
SCLK High Pulse Width (tSKH)
SCLK Period (tSKT)
Buss Access Time (tCBA)
Buss Relinquish Time (tBR)
Setup Time -SCLK Falling to CSN Falling (tCSSU)
CSN Low Before SCLK Rises (tCS)
SCLK Falling to Data Valid (tSD)
CSN Falling to status Rising (tDCS)
SCLK 33 Falling to Status Rising Free Run (tDSS)
SCLK32 Falling to Status Falling ( tDSE)
Delay SD Low to initiate Conversion (tpu)
Aperture Delay Slave-Mode (tAPC)
Aperture Delay Free-Running Mode (tAPS)
MIN.
8.25
400
7.75
110
110
250
0
90
TYP. MAX
500
125
125
51
45
50
69
70
45
5
30
35
.UNIT
µs
ns
µs
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
µs
ns
ns
COND.
SP8530DS/01
SP8530 S2ADCTM - Simultaneous Sampling Analog to Digital Converter
8
© Copyright 2000 Sipex Corporation

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