HCPL-0600 查看數據表（PDF） - Fairchild Semiconductor
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HCPL-0600 Datasheet PDF : 13 Pages
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HIGH SPEED-10 MBit/s
LOGIC GATE OPTOCOUPLERS
HCPL-0600
HCPL-0601
Fig. 9 Typical Enable Propagation Delay vs. Temparature
90
V = 5V
CC
80 VEH = 3V
VEL = 0V
70 IF = 7.5mA
60
tELH
RL = 1kΩ
50
tELH
40
RL = 350Ω
30
20
tEHL
RL = 350Ω & 1kΩ
10
0
-40
-20
0
20
40
60
TA - TEMPERATURE (˚C)
80
100
Fig. 10 Typical Rise and Fall Time vs. Temperature
240
V = 5V
CC
IF = 7.5mA
200
160
tr
RL = 1kΩ
120
80
40
0
-40
-20
tr
RL = 350Ω
tf
RL = 350Ω & 1kΩ
0
20
40
60
80
100
TA - TEMPERATURE (˚C)
Fig. 11 Typical Pulse Width Distortion vs. Temperature
40
V = 5V
CC
35 IF = 7.5mA
30
25
RL = 1kΩ
20
15
10
RL = 350Ω
5
0
-40
-20
0
20
40
60
TA - TEMPERATURE (˚C)
80
100
© 2004 Fairchild Semiconductor Corporation
Page 7 of 13
1/7/04
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