IDT7025S17J 查看數據表（PDF） - Integrated Device Technology
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IDT7025S17J Datasheet PDF : 21 Pages
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IDT7025S/L
High-Speed 8K x 16 Dual-Port Static RAM
Military, Industrial and Commercial Temperature Ranges
AC Electrical Characteristics Over the
Operating Temperature and Supply Voltage(5,6)
7025X15
Com'l Only
7025X17
Com'l Only
7025X20
Com'l &
Military
7025X25
Com'l &
Military
Symbol
Parameter
Min. Max. Min. Max. Min. Max. Min. Max. Unit
WRITE CYCLE
tWC
Write Cycle Time
tEW
Chip Enable to End-of-Write(3)
tAW
Address Valid to End-of-Write
tAS
Address Set-up Time(3)
tWP
Write Pulse Width
tWR
Write Recovery Time
tDW
Data Valid to End-of-Write
tHZ
Output High-Z Time(1,2)
tDH
Data Hold Time(4)
tWZ
Write Enable to Output in High-Z(1,2)
tOW
Output Active from End-of-Write(1,2,4)
tSWRD
SEM Flag Write to Read Time
tSPS
SEM Flag Contention Window
15
____
17
____
20
____
25
____
ns
12
____
12
____
15
____
20
____
ns
12
____
12
____
15
____
20
____
ns
0
____
0
____
0
____
0
____
ns
12
____
12
____
15
____
20
____
ns
0
____
0
____
0
____
0
____
ns
10
____
10
____
15
____
15
____
ns
____
10
____
10
____
12
____
15
ns
0
____
0
____
0
____
0
____
ns
____
10
____
10
____
12
____
15
ns
0
____
0
____
0
____
0
____
ns
5
____
5
____
5
____
5
____
ns
5
____
5
____
5
____
5
____
ns
2683 tbl 13a
7025X35
Com'l &
Military
7025X55
Com'l, Ind
& Military
7025X70
Military Only
Symbol
Parameter
Min. Max. Min. Max. Min. Max. Unit
WRITE CYCLE
tWC
tEW
tAW
tAS
tWP
tWR
tDW
tHZ
tDH
tWZ
tOW
tSWRD
tSPS
Write Cycle Time
Chip Enable to End-of-Write(3)
Address Valid to End-of-Write
Address Set-up Time(3)
Write Pulse Width
Write Recovery Time
Data Valid to End-of-Write
Output High-Z Time(1,2)
Data Hold Time(4)
Write Enable to Output in High-Z(1,2)
Output Active from End-of-Write(1,2,4)
SEM Flag Write to Read Time
SEM Flag Contention Window
35
____
55
____
70
____
ns
30
____
45
____
50
____
ns
30
____
45
____
50
____
ns
0
____
0
____
0
____
ns
25
____
40
____
50
____
ns
0
____
0
____
0
____
ns
15
____
30
____
40
____
ns
____
15
____
25
____
30
ns
0
____
0
____
0
____
ns
____
15
____
25
____
30
ns
0
____
0
____
0
____
ns
5
____
5
____
5
____
ns
5
____
5
____
5
____
ns
NOTES:
2683 tbl 13b
1. Transition is measured 0mV from Low or High-impedance voltage with the Output Test Load (Figure 2).
2. This parameter is guaranteed by device characterization, but is not production tested.
3. To access RAM, CE = VIL, UB or LB = VIL, SEM = VIH. To access semaphore, CE = VIH or UB & LB = VIH, and SEM = VIL. Either condition must be valid for the
entire tEW time.
4. The specification for tDH must be met by the device supplying write data to the RAM under all operating conditions. Although tDH and tOW values will vary over voltage
and temperature, the actual tDH will always be smaller than the actual tOW.
5. 'X' in part number indicates power rating (S or L).
6. Industrial temperature: for other speeds, packages and powers contact your sales office.
6.1402
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