IDT7015S17PFB(1996) 查看數據表（PDF） - Integrated Device Technology

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IDT7015S17PFB
(Rev.:1996)

HIGH-SPEED 8K x 9 DUAL-PORT STATIC RAM

Integrated Device Technology 

IDT7015S/L

HIGH-SPEED 8K x 9 DUAL-PORT STATIC RAM

MILITARY AND COMMERCIAL TEMPERATURE RANGES

AC ELECTRICAL CHARACTERISTICS OVER THE

OPERATING TEMPERATURE AND SUPPLY VOLTAGE(5)

Symbol

Parameter

IDT7015X12

Com'l. Only

Min. Max.

WRITE CYCLE

tWC

Write Cycle Time

tEW

Chip Enable to End-of-Write(3)

12

—

10

—

tAW

Address Valid to End-of-Write

tAS

Address Set-up Time(3)

10

—

0

—

tWP

Write Pulse Width

10

—

tWR

Write Recovery Time

2

—

tDW

tHZ

tDH

tWZ

tOW

tSWRD

tSPS

Data Valid to End-of-Write

Output High-Z Time(1, 2)

Data Hold Time(4)

Write Enable to Output in High-Z(1, 2)

Output Active from End-of-Write(1, 2, 4)

SEM Flag Write to Read Time

SEM Flag Contention Window

10

—

—

10

0

—

—

10

3

—

5

—

5

—

IDT7015X15

Com'l. Only

Min. Max.

15

—

12

—

12

—

0

—

12

—

2

—

10

—

—

10

0

—

—

10

3

—

5

—

5

—

IDT7015X17

Com'l. Only

Min. Max. Unit

17

— ns

12

— ns

12

— ns

0

— ns

12

— ns

2

— ns

10

— ns

—

10

ns

0

— ns

— 10 ns

0

— ns

5

— ns

5

— ns

IDT7015X20 IDT7015X25 IDT7015X35

Symbol

Parameter

Min. Max. Min. Max. Min. Max. Unit

WRITE CYCLE

tWC

Write Cycle Time

tEW

Chip Enable to End-of-Write(3)

20

—

25

—

35

— ns

15

—

20

—

30

— ns

tAW

Address Valid to End-of-Write

tAS

Address Set-up Time(3)

15

—

20

—

30

— ns

0

—

0

—

0

— ns

tWP

Write Pulse Width

15

—

20

—

25

— ns

tWR

Write Recovery Time

2

—

2

—

2

— ns

tDW

tHZ

tDH

tWZ

tOW

tSWRD

tSPS

Data Valid to End-of-Write

Output High-Z Time(1, 2)

Data Hold Time(4)

Write Enable to Output in High-Z(1, 2)

Output Active from End-of-Write(1, 2, 4)

SEM Flag Write to Read Time

SEM Flag Contention Window

15

—

15

—

15

— ns

—

12

—

15

—

20 ns

0

—

0

—

0

— ns

—

12

—

15

—

20 ns

3

—

3

—

3

— ns

5

—

5

—

5

— ns

5

—

5

—

5

— ns

NOTES:

2954 tbl 12

1. Transition is measured ±200mV from Low or High-impedance voltage with the Output test load (Figure 2).

2. This parameter is guaranteed by device characterization but not tested.

3. To access RAM, CE = VIL and SEM = VIH. To access semaphore, CE = VIH and SEM = VIL. Either condition must be valid for the entire tEW time.

4. The specification for tDH must be met by the device supplying write data to the RAM under all operating conditions. Although tDH and tOW values will vary

over voltage and temperature, the actual tDH will always be smaller than the actual tOW.

5. "X" in part numbers indicates power rating (S or L).

6.12

9

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