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AS4C4M4F0 查看數據表(PDF) - Alliance Semiconductor
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产品描述 (功能)
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AS4C4M4F0
5V 4M×4 CMOS DRAM (Fast Page mode)
Alliance Semiconductor
AS4C4M4F0 Datasheet PDF : 18 Pages
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Logic block diagram for 2K refresh
V
CC
GND
RAS
RAS clock
generator
A0
A1
A2
A3
A4
CAS clock
CAS
generator
A5
A6
A7
A8
A9
WE clock
A10
WE
generator
AS4C4M4F0
AS4C4M4F1
®
Column decoder
Sense amp
2048 × 2048 × 4
Array
(16,777,216)
Data
I/O
buffers
I/O0 to I/O3
OE
Substrate bias
generator
Recommended operating conditions
Parameter
Symbol
Min
Nominal
Max Unit
Supply voltage
V
CC
4.5
5.0
5.5
V
GND
0.0
0.0
0.0
V
Input voltage
V
IH
2.4
–
V
IL
–0.5
†
–
V
CC
V
0.8
V
Commercial
0
–
70
Ambient operating temperature
Industrial
T
A
-40
–
°C
85
†
V
IL
min -3.0V for pulse widths less than 5 ns. Recommended operating conditions apply throughout this document unlesss otherwise specified.
4/11/01; v.0.9
Alliance Semiconductor
P. 3 of 18
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