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FL7930CMX 查看數據表(PDF) - Fairchild Semiconductor

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FL7930CMX Datasheet PDF : 20 Pages
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Pin Configuration
Figure 6. Pin Configurations (Top View)
Pin Definitions
Pin #
1
2
3
4
5
6
7
8
Name
INV
OVP
RDY
COMP
CS
ZCD
GND
OUT
VCC
Description
This pin is the inverting input of the error amplifier. The output voltage of the boost PFC
converter should be resistively divided to 2.5V.
FL7930B: This pin is used to detect PFC output over-voltage when INV pin information is not
correct.
FL7930C: This pin is used to detect PFC output-voltage reaching a pre-determined value.
When output voltage reaches 89% of rated output voltage, this pin is pulled HIGH, which is an
(open-drain) output type.
This pin is the output of the transconductance error amplifier. Components for the output
voltage compensation should be connected between this pin and GND.
This pin is the input of the over-current protection comparator. The MOSFET current is sensed
using a sensing resistor and the resulting voltage is applied to this pin. An internal RC filter is
included to filter switching noise.
This pin is the input of the zero-current detection block. If the voltage of this pin goes higher
than 1.5V, then goes lower than 1.4V, the MOSFET is turned on.
This pin is used for the ground potential of all the pins. For proper operation, the signal ground
and the power ground should be separated.
This pin is the gate drive output. The peak sourcing and sinking current levels are +500mA
and -800mA, respectively. For proper operation, the stray inductance in the gate driving path
must be minimized.
This is the IC supply pin. IC current and MOSFET drive current are supplied using this pin.
© 2011 Fairchild Semiconductor Corporation
FL7930 • Rev. 1.0.0
4
www.fairchildsemi.com

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