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PS11037 查看數據表(PDF) - MITSUBISHI ELECTRIC

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PS11037 Datasheet PDF : 5 Pages
1 2 3 4 5
PRELIMINARY NSootmicee:pTahriasmisetnroict laimfiintsalasrepescuibficjeacttiotno.change.
MITSUBISHI SEMICONDUCTOR <Application Specific Intelligent Power Module>
PS11037
FLAT-BASE TYPE
INSULATED TYPE
CURRENT ABNORMALITY PROTECTIVE FUNCTIONS
Ic(A)
SC
Short circuit trip level
Over current trip level
Protection is achieved by monitoring and filtering the N-side
DC-Bus current. When a current trip-level is exceeded, all the N-
side IGBTs are intercepted (turned OFF) and a fault-signal is out-
put. After the fault-signal output duration (1.8msec (typ.)@ 25°C),
the interception is Reset at the following OFF input signal level
(more than 4.0V).
OC
Collector current
0
2
10
tw (µs)
(Fig. 5)
ARM-SHOOT-THROUGH INTER-LOCK PROTECTIVE FUNCTION
P-Side Input Signal : VCIN(p) ON
N-Side Input Signal : VCIN(n) ON
P-Side IGBT Gate : VGE(p)
0
a1
a4
a3
a2
b4
b1
b2
N-Side IGBT Gate : VGE(n) 0
b3
(Fig. 6)
Description:
(1) During the ON-State of either of the upper-arm or the lower-arm IGBT, the inter-lock protection circuit blocks any erroneous ON pulses (re-
sulting from input noise) from triggering the other arm IGBT and thus it prevents the arm-shoot-through situation.
(2) When two ON-signals are received for both the upper and the lower arms, the signal received first will be passed to the IGBT and the sec-
ond signal will be blocked. The second signal will be passed to its corresponding IGBT immediately after the first signal is OFF.
Note: This protective function provides no fault signaling output.
Operation:
a1. P-side normal ON-signal P-side IGBT gate turns ON.
a2. N-side erroneous ON-signal N-side IGBT gate remains OFF.
a3. While P-side ON-signal remains P-side IGBT gate remains ON.
a4. N-side normal ON-signal N-side IGBT gate turns ON.
b1. N-side normal ON-signal N-side IGBT gate turns ON.
b2. Simultaneous ON-signals P-side IGBT gate remains OFF.
b3. N-side receives OFF-signal N-side IGBT gate turns OFF.
b4. Immediately after (b3) P-side IGBT gate turns ON.
RECOMMENDED I/O INTERFACE CIRCUIT
5V
Note :
The parts shown dotted
are to be used if noise
filtering is required.
CPU
5V
5.1k
R
R
10k
0.1nF 0.1nF
VD(15V) ASIPM
UP,VP,WP,UN,VN,WN
Fo
V(amp)
GND(Logic)
(Fig. 7)
Jan. 2000

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