GS8161E18D-133I 查看數據表（PDF） - Giga Semiconductor

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GS8161E18D-133I

1M x 18, 512K x 32, 512K x 36 18Mb Sync Burst SRAMs

Giga Semiconductor 

GS8161E18(T/D)/GS816132(D)/GS816136(T/D)

Byte Write Truth Table

Function

GW

BW

BA

BB

BC

BD

Notes

Read

H

H

X

X

X

X

1

Read

H

L

H

H

H

H

1

Write byte a

H

L

L

H

H

H

2, 3

Write byte b

H

L

H

L

H

H

2, 3

Write byte c

H

L

H

H

L

H

2, 3, 4

Write byte d

H

L

H

H

H

L

2, 3, 4

Write all bytes

H

L

L

L

L

L

2, 3, 4

Write all bytes

L

X

X

X

X

X

Notes:

1. All byte outputs are active in read cycles regardless of the state of Byte Write Enable inputs.

2. Byte Write Enable inputs BA, BB, BC and/or BD may be used in any combination with BW to write single or multiple bytes.

3. All byte I/Os remain High-Z during all write operations regardless of the state of Byte Write Enable inputs.

4. Bytes “C” and “D” are only available on the x36 version.

Rev: 2.13 11/2004

11/36

Specifications cited are subject to change without notice. For latest documentation see http://www.gsitechnology.com.

© 1999, GSI Technology

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