BR24E08F 查看數據表（PDF） - ROHM Semiconductor
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BR24E08F Datasheet PDF : 12 Pages
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Memory Ics
BR24C08 / BR24C08F / BR24C08FJ / BR24C08FV / BR24C16/ BR24C16F /
BR24C16FJ / BR24C16FV / BR24E16 / BR24E16F / BR24E16FJ / BR24E16FV
(10) Random read
BR24C08 / F / FJ / FV
S
W
T
R
A
I
R
SLAVE
T
T
ADDRESS E
WORD
ADDRESS(n)
S
T
R
A
E
R
SLAVE A
T
ADDRESS D
SDA
LINE
1 0 1 0 A2 P1 P0
WA
7
WA
0
1 0 1 0 A2 P1P0
D7
DATA(n)
S
T
O
P
D0
RA
A
RA
A
/C
C
/C
C
WK
K
WK
K
Fig.13
BR24C16 / F / FJ / FV
S
W
S
T
R
T
R
S
A
I
A
E
T
R
SLAVE
T
WORD
R
SLAVE A
O
T
ADDRESS E
ADDRESS(n)
T
ADDRESS D
DATA(n)
P
SDA
LINE
1 0 1 0 P2 P1 P0
WA
7
WA
0
1 0 1 0 P2 P1P0
D7
D0
RA
A
RA
A
/C
C
/C
C
WK
K
WK
K
Fig.14
BR24E16 / F / FJ / FV
S
W
T
R
A
I
R
SLAVE T
T ADDRESS E
1st WORD
ADDRESS(n)
SDA
LINE
1 0 1 0 A2 A1 A0
∗
∗
∗
∗
∗
WA
10
S
T
R
S
A
E
T
2nd WORD
R
SLAVE A
O
ADDRESS(n)
T
ADDRESS D
DATA(n)
P
WA
0
1 0 1 0 A2 A1A0
D7
D0
RA
A
A
RA
A
/C
C
C
/C
C
WK
K
K
WK
K
Fig.15
$ This command can read the designated word address data.
$ When an ACK signal LOW is detected after D0 and a stop condition is not sent from the master (µ-COM), the next
word address data can be read. [All words all read enabled]
(See Fig.16 to 18 for the sequential read cycles.)
$ This command is ended by inputting a HIGH signal to the ACK signal after D0 and raising the SDA signal (stop
condition) by raising SCL to HIGH.
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