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BR24E08F 查看數據表(PDF) - ROHM Semiconductor

零件编号
产品描述 (功能)
生产厂家
BR24E08F
ROHM
ROHM Semiconductor ROHM
BR24E08F Datasheet PDF : 12 Pages
1 2 3 4 5 6 7 8 9 10 Next Last
Memory Ics
BR24C08 / BR24C08F / BR24C08FJ / BR24C08FV / BR24C16/ BR24C16F /
BR24C16FJ / BR24C16FV / BR24E16 / BR24E16F / BR24E16FJ / BR24E16FV
(5) Write protect (WP)
When WP pin set to VCC (High level), write protect is set by all address. When WP pin set to GND (Low level), enable
to write to all address. Either control this pin or connect to GND (or VCC). It is inhibited from being left unconnected.
(6) ACK signal
The acknowledge signal (ACK signal) is determined by software and is used to indicate whether or not a data transfer
is proceeding normally. The transmitting device, whether the master or slave, opens the bus after an 8-bit data output
(µ-COM when a write or read command of the slave address input ; this IC when reading data).
For the receiving device during the ninth clock cycle, SDA is set to LOW and an acknowledge signal (ACK signal) is
sent to indicate that it received the 8-bit data (this IC when a write command or a read command of the slave address
input, µ-COM when a read command data output).
The ICs output a LOW acknowledge signal (ACK signal) after recognizing the start condition and slave address (8
bits).
When data is being write to the ICs, a LOW acknowledge signal (ACK signal) is output after the receipt of each 8 bits
of data (word address and write data).
When data is being read from the IC, 8bits of data (read data) are output and the IC waits for a returned LOW
acknowledge signal (ACK signal). When an acknowledge signal (ACK signal) is detected and a stop condition is not
sent from the master (µ-COM) side, the IC continues to output data. If an acknowledge signal (ACK signal) is not
detected, the IC interrupts the data transfer and ceases reading operations after recognizing the stop condition (stop
bit). The IC then enters the waiting or standby state.
(See Fig.3 for acknowledge signal (ACK signal) response.)
Start condition
(start bit)
SCL
1
(from µ-COM)
8
9
SDA
(µ−COM
output data)
SDA
(IC output data)
Acknowledge signal
Fig.3 Acknowledge (ACK signal) response
(ACK signal)
(during write and read slave address input)

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