PSLC08C 查看數據表（PDF） - Protek Devices
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PSLC08C Datasheet PDF : 5 Pages
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APPLICATIONS
The PSLC Series are TVS arrays designed to protect I/O or data
lines from the damaging effects of ESD and EFT. This product
series provides both unidirectional and bidirectional protection,
with a surge capability of 500 Watts PPP per line for an 8/20µs
waveform and ESD protection > 40kV.
UNIDIRECTIONAL
COMMON-MODE CONFIGURATION (Figure 1)
The two PSLC Series devices provide protection in a common-
mode configuration as depicted in Figure 1.
Circuit connectivity is as follows:
✔ TVS Device 1: Line 1(D+) is connected to Pins 2 & 3.
✔ TVS Device 2: Line 2(D-) is connected to Pins 2 & 3.
✔ Both TVS Devices: Pins 1 & 4 connected to ground.
PSLC03
thru
PSLC24C
Figure 1 - Unidirectional Configuration (Two TVS Devices)
Common-Mode USB Protection
;;;;;;;;;;;;;;;;;;;;;1;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;4;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;1;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;4;;;;;;;;;;;;;;;;;;;;;;;;;;;;
GND
SOLDER PAD
2
3
2
3
USB IC
D+
D-
BIDIRECTIONAL
DIFFERENTIAL-MODE CONFIGURATION (Figure 2)
The PSLCxxC Series provides protection in a differential-mode
configuration as depicted in Figure 2.
Circuit connectivity is as follows:
✔ Line 1(RX) is connected to Pins 1 & 4.
✔ Line 2(TX) is connected to Pins 2 & 3.
CIRCUIT BOARD LAYOUT RECOMMENDATIONS
Circuit board layout is critical for Electromagnetic Compatibility
(EMC) protection. The following guidelines are recommended:
✔ The protection device should be placed near the input
terminals or connectors, the device will divert the transient
current immediately before it can be coupled into the nearby
traces.
✔ The path length between the TVS device and the protected
line should be minimized.
✔ All conductive loops including power and ground loops
should be minimized.
✔ The transient current return path to ground should be kept
as short as possible to reduce parasitic inductance.
✔ Ground planes should be used whenever possible. For
multilayer PCBs, use ground vias.
Figure 2 - Bidirectional Configuration
Differential-Mode Ethernet Protection
RX
R
1
4
R
2
3
TX
05091.R11 2/07
4
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