STK12C68-SF55M 查看數據表（PDF） - Unspecified
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STK12C68-SF55M Datasheet PDF : 13 Pages
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STK12C68
ABSOLUTE MAXIMUM RATINGSa
Voltage on Input Relative to Ground . . . . . . . . . . . . . –0.5V to 7.0V
Voltage on Input Relative to VSS . . . . . . . . . .–0.6V to (VCC + 0.5V)
Voltage on DQ0-7 or HSB . . . . . . . . . . . . . . . .–0.5V to (VCC + 0.5V)
Temperature under Bias. . . . . . . . . . . . . . . . . . . . . .–55°C to 125°C
Storage Temperature . . . . . . . . . . . . . . . . . . . . . . . .–65°C to 150°C
Power Dissipation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1W
DC Output Current (1 output at a time, 1s duration) . . . . . . . 15mA
DC CHARACTERISTICS
Note a:
Stresses greater than those listed under “Absolute Maximum
Ratings” may cause permanent damage to the device. This is a
stress rating only, and functional operation of the device at con-
ditions above those indicated in the operational sections of this
specification is not implied. Exposure to absolute maximum rat-
ing conditions for extended periods may affect reliability.
(VCC = 5.0V ± 10%)e
SYMBOL
PARAMETER
ICC1b
Average VCC Current
ICC2c
ICC3b
ICC4c
ISB1d
Average VCC Current during STORE
Average VCC Current at tAVAV = 200ns
5V, 25°C, Typical
Average VCAP Current during
AutoStore™ Cycle
Average VCC Current
(Standby, Cycling TTL Input Levels)
ISB2d
IILK
IOLK
VIH
VIL
VOH
VOL
VBL
TA
VCC Standby Current
(Standby, Stable CMOS Input Levels)
Input Leakage Current
Off-State Output Leakage Current
Input Logic “1” Voltage
Input Logic “0” Voltage
Output Logic “1” Voltage
Output Logic “0” Voltage
Logic “0” Voltage on HSB Output
Operating Temperature
COMMERCIAL
MIN
MAX
85
75
65
55
3
10
INDUSTRIAL/
MILITARY
MIN
MAX
90
75
65
55
3
10
UNITS
mA
mA
mA
mA
mA
mA
2
2
mA
27
28
mA
23
24
mA
20
21
mA
19
19
mA
1.5
2.5
mA
±1
±1
µA
±5
±5
µA
2.2
VCC + .5
2.2
VCC + .5
V
VSS – .5
0.8
VSS – .5
0.8
V
2.4
2.4
V
0.4
0.4
V
0.4
0.4
V
0
70
–40/-55 85/125
°C
NOTES
tAVAV = 25ns
tAVAV = 35ns
tAVAV = 45ns
tAVAV = 55ns
All Inputs Don’t Care, VCC = max
W ≥ (V CC– 0.2V)
All Others Cycling, CMOS Levels
All Inputs Don’t Care
tAVAV = 25ns, E ≥ VIH
tAVAV = 35ns, E ≥ VIH
tAVAV = 45ns, E ≥ VIH
tAVAV = 55ns, E ≥ VIH
E ≥ (V CC – 0.2V)
All Others VIN ≤ 0.2V or ≥ (VCC – 0.2V)
VCC = max
VIN = VSS to VCC
VCC = max
VIN = VSS to VCC, E or G ≥ VIH
All Inputs
All Inputs
IOUT = – 4mA except HSB
IOUT = 8mA except HSB
IOUT = 3mA
Note b:
Note c:
Note d:
Note e:
ICC1 and ICC3 are dependent on output loading and cycle rate. The specified values are obtained with outputs unloaded.
EICC≥2VaInHdwIiCllCn4oatrperothdeucaevesrtaagnedbcyurcruernrtesnrteleqvueirlesdufnotriltahneydnuorantvioonlaotilfethceycrleesipnepcrtiovgereSsTsOhRaEs
cycles
timed
(tSTORE
out.
)
.
VCC reference levels throughout this datasheet refer to VCCX if that is where the power supply connection is made, or VCAP if VCCX is con-
nected to ground.
AC TEST CONDITIONS
5.0V
Input Pulse Levels . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 0V to 3V
Input Rise and Fall Times. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ≤ 5ns
Input and Output Timing Reference Levels . . . . . . . . . . . . . . . 1.5V
Output Load . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . See Figure 1
CAPACITANCEf (TA = 25°C, f = 1.0MHz)
SYMBOL
PARAMETER
MAX UNITS CONDITIONS
CIN
COUT
Input Capacitance
8
Output Capacitance
7
pF
∆V = 0 to 3V
pF
∆V = 0 to 3V
Note f: These parameters are guaranteed but not tested.
OUTPUT
255 Ohms
480 Ohms
30 pF
INCLUDING
SCOPE AND
FIXTURE
Figure 1: AC Output Loading
October 2003
2 Document Control # ML0008 rev 0.4
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