UDA1361TS 查看數據表（PDF） - NXP Semiconductors.
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UDA1361TS Datasheet PDF : 18 Pages
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NXP Semiconductors
96 kHz sampling 24-bit stereo audio ADC
Product specification
UDA1361TS
Table 4 Decimation filter characteristic
ITEM
CONDITION
Pass-band ripple
Pass-band droop
Stop band
Dynamic range
0 to 0.45fs
0.45fs
>0.55 fs
0 to 0.45 fs
VALUE (dB)
±0.01
−0.2
−70
>135
DC cancellation filter
A IIR high-pass filter is provided to remove unwanted
DC components. The filter characteristics are given in
Table 5.
Table 5 DC cancellation filter characteristic
ITEM
CONDITION
Pass-band ripple −
Pass-band gain −
Droop
Attenuation
at DC
at 0.00045fs
at 0.00000036fs
Dynamic range 0 to 0.45fs
VALUE (dB)
none
0
−0.031
>40
>135
Mute
On recovery from Power-down, the serial data output
DATAO is held LOW until valid data is available from the
decimation filter. This time tracks with the sampling
frequency:
t
=
-1---2---2----8---8--
fs
,
t
=
256
ms
when
fs
=
48
kHz.
Power-down mode/input voltage control
The PWON pin can control the power saving together with
the optional gain switch for 2 or 1 V (RMS) input.
The UDA1361TS supports 2 V (RMS) input using a series
resistor of 12 kΩ. For the definition of the pin settings for
1 or 2 V (RMS) mode, it is assumed that this resistor is
present as a default component.
Table 6 Power-down/input voltage control
PWON
L
M
H
POWER-DOWN OR GAIN
Power-down mode
0 dB gain
6 dB gain
Serial interface formats
handbook, full pWagSewidth
1
BCK
LEFT
23
DATA
MSB B2
WS
BCK
LEFT
123
DATA MSB B2
2002 Nov 25
≥8 1
RIGHT
23
LSB MSB B2
INPUT FORMAT I2S-BUS
≥8 1
RIGHT
23
LSB MSB B2
MSB-JUSTIFIED FORMAT
Fig.3 Serial interface formats.
6
≥8
LSB MSB
≥8
LSB MSB B2
MGT453
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