UDA1361TS 查看數據表（PDF） - NXP Semiconductors.
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UDA1361TS Datasheet PDF : 18 Pages
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NXP Semiconductors
96 kHz sampling 24-bit stereo audio ADC
Product specification
UDA1361TS
SYMBOL
PARAMETER
CONDITIONS
MIN.
TYP.
MAX.
Digital input pin (SYSCLK)
VIH
HIGH-level input voltage
VIL
LOW-level input voltage
|ILI|
input leakage current
Ci
input capacitance
2.0
−
−0.5
−
−
−
−
−
5.5
+0.8
1
10
Digital 3-level input pins (PWON, SFOR, MSSEL)
VIH
HIGH-level input voltage
VIM
MIDDLE-level input
voltage
0.9VDD
−
0.4VDD
−
VDD + 0.5
0.6VDD
VIL
LOW-level input voltage
−0.5
−
+0.4
Digital input/output pins (BCK, WS)
VIH
HIGH-level input voltage
2.0
−
5.5
VIL
LOW-level input voltage
−0.5
−
+0.8
|ILI|
input leakage current
−
−
1
Ci
input capacitance
−
−
10
VOH
HIGH-level output voltage IOH = −2 mA
0.85VDDD −
−
VOL
LOW-level output voltage IOL = 2 mA
−
−
0.4
Digital output pin (DATAO)
VOH
HIGH-level output voltage IOH = −2 mA
0.85VDDD −
−
VOL
LOW-level output voltage IOL = 2 mA
−
−
0.4
Analog
Vref
reference voltage
with respect to VSSA 0.45VDDA 0.5VDDA 0.55VDDA
Ri
input resistance
−
12
−
Ci
input capacitance
−
20
−
Note
1. All power supply connections must be connected to the same external power supply unit.
UNIT
V
V
μA
pF
V
V
V
V
V
μA
pF
V
V
V
V
V
kΩ
pF
2002 Nov 25
8
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