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A6850KLTR-T 查看數據表(PDF) - Allegro MicroSystems

零件编号
产品描述 (功能)
生产厂家
A6850KLTR-T
Allegro
Allegro MicroSystems Allegro
A6850KLTR-T Datasheet PDF : 9 Pages
1 2 3 4 5 6 7 8 9
A6850
Dual Channel Switch Interface IC
Functional Description
Thermal Shutdown (TSD)
The A6850 protects itself from excessive heat damage by
disabling both outputs when the junction temperature, TJ ,
rises above the TSD threshold (TTSD). The outputs will
remain off until the junction temperature falls below the
TTSD level minus the TSD hysteresis, TTSDhys.
TJ can be estimated by calculating the power dissipation (PD)
of the A6850. To calculate PD:
PD = VIN IINQ
(1)
VOUTPUT1 IOUTPUT1 VOUTPUT2 IOUTPUT2
VSENSE1 ISENSE1 VSENSE2 ISENSE2 .
PD = VIN IINQ
(2)
+ (VIN VOUTPUT1 ) IOUTPUT1
+ (VIN VOUTPUT2 ) IOUTPUT2
+ (VIN VSENSE1 ) ISENSE1
+ (VIN VSENSE2 ) ISENSE2 .
The temperature rise of the A6850 can be calculated by
multiplying PD and the thermal resistance from junction to
ambient, RθJA . The formula for temperature rise, ΔT, is:
ΔT = PD × RθJA .
(3)
The RθJA for an 8-pin SOIC (Allegro L package) on a one-
layer board with minimum copper area is 140°C / W. (More
thermal data is available on the Allegro MicroSystems Web
site.)
The total junction temperature can be calculated by:
TJ = TA + ΔT ,
(4)
where TA is the ambient air temperature.
Example: Calculating the power dissipation and temperature
rise, given:
TA = 25°C,
VIN = 5 V,
IINQ = 5 mA,
IOUTPUT1 = IOUTPUT2 = 15 mA,
VDropx = VIN – VOUTPUTx = 0.7 V,
ISENSEx = IOUTPUTx /10 = 1.5 mA, and
RSENSE1 = RSENSE2 = 2 kΩ.
Then:
PD = 5 V × 5 mA
+ 0.7 V×15 mA+[5 V – (1.5 mA×2 kΩ)]×1.5 mA
+ 0.7 V×15 mA+[5 V – (1.5 mA×2 kΩ)]×1.5 mA
= 52 mW .
Substituting in equation 3:
ΔT = 52 mW × 140°C / W = 7.3°C .
Substituting in equation 4:
TJ = 25°C + 7.3°C = 32.3°C .
Output Current Limit
The A6850 limits the output current to a maximum current
of IOUTPUTM. The output current will remain at the current
limit until the output load is reduced or the A6850 goes into
thermal shutdown.
The high output current limit allows the bypass capacitor,
CBYP , on the Hall sensor to charge up quickly. This allows
a high slew rate on the VCC pin of the Hall sensor, ensur-
ing that the sensor Power-On State will be correct. See the
Applications Information section for schematic diagrams and
power calculations.
Allegro MicroSystems, Inc.

115 Northeast Cutoff, Box 15036
Worcester, Massachusetts 01615-0036 (508) 853-5000
www.allegromicro.com

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