CD22101 查看數據表（PDF） - Intersil

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CD22101

CMOS 4 x 4 x 2 Crosspoint Switch with Control Memory

Intersil 

CD22101, CD22102

Test Circuits and Waveforms (Continued)

STROBE

50%

DATA

tSU

tH

50%

ADDRESS

OUTPUT OF SWITCH

ADDRESSED

IF SETUP AND HOLD TIMES PROVIDED ARE TOO SHORT,

AN UNADDRESSED SWITCH MAY BE TURNED ON OR OFF

SIMULTANEOUSLY WITH THE ADDRESSED SWITCH

DATA-IN

STROBE

Y2

tHLH

1µs

50%

tHHL

1µs

tHLH

50%

1µs

SET ALL SWITCHES TO OFF INITIALLY APPLY VDD

TO ALL X INPUTS AND RETURN ALL Y OUTPUTS TO

VSS THROUGH 1kΩ. ADDRESS X1Y2 (ABCD) WITH fIN = 10kHz

FIGURE 9. ADDRESS TO STROBE SETUP AND HOLD TIMES FIGURE 10. STROBE TO DATA-IN HOLD TIME tH, FOR CD22101

CONTROLS

X (N)

1kΩ

SW

Y (N)

10kΩ

SW = ANY CROSSPOINT

5µs

VDD

CONTROL

0

75mV

VOS

0

FIGURE 11. TEST CIRCUIT AND WAVEFORMS FOR CROSSTALK (CONTROL INPUT TO SIGNAL OUTPUT)

ON

VIS

SW

600Ω

600Ω

SW = ANY CROSSPOINT

600Ω

OFF

SW

VOS

600Ω

-140

-120

-100

-80

-60

-40

-20

0

102

VDD = 5V

10V

15V

TA = 25oC

RS = 600Ω

RL = 600Ω

VIS = 1VRMS

103

104

105

106

107

INPUT SIGNAL FREQUENCY (Hz)

FIGURE 12. TEST CIRCUIT AND TYPICAL CROSSTALK AS A FUNCTION OF FREQUENCY BETWEEN SWITCH CIRCUITS IN THE

SAME PACKAGE

4-203

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