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TDA8007BHL/C3,118 查看數據表(PDF) - NXP Semiconductors.

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TDA8007BHL/C3,118
NXP
NXP Semiconductors. NXP
TDA8007BHL/C3,118 Datasheet PDF : 51 Pages
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NXP Semiconductors
TDA8007BHL
Multiprotocol IC card interface
If a microcontroller with a multiplexed address and data bus (such as 80C51) is used, then
pins D0 to D7 may be directly connected to port P0 to P7, see Figure 7. Automatic
switching to the multiplexed bus configuration occurs only for TDA8007BHL/C3, if a rising
edge is detected on signal ALE.
In this event, pins AD0 to AD3 play no role and may be tied to VDD or ground.
When signal CS = low, the demulitplexing of address and data is performed internally
using signal ALE, a low pulse on pin RD allows the selected register to be read, a LOW
pulse on pin WR allows the selected register to be written to, see Figure 8. Using a 80C51
microcontroller, the TDA8007BHL/C3 is simply controlled with MOVX instructions.
AD0 to AD3
CS
D0 to D7
ALE
WR
RD
REC
LATCH
Fig 7. Multiplexed bus recognition
MUX
RD
WR
MUX
addresses
REGISTERS
fce679
ALE
CS
tW(ALE)
D0 to D7
tAVLL
tW(RD)
t(AL-RWL)
ADDRESS
DATA
READ
t(RWH-AH)
RD
t(RL-DV)
WR
Fig 8. Control with multiplexed bus (read and write)
tAVLL
t(AL-RWL)
t(RWH-AH)
ADDRESS
t(DV-WL)
DATA WRITE
tW(WR)
fce680
8.2 Control registers
The TDA8007BHL has two complete analog interfaces which can drive cards 1 and 2.
The data to and from these two cards shares the same ISO UART. The data to and from a
third card (card 3), externally interfaced (with a TDA8020 or TDA8004 for example), may
also share the same ISO UART.
TDA8007BHL
Product data sheet
All information provided in this document is subject to legal disclaimers.
Rev. 9.1 — 18 June 2012
© NXP B.V. 2012. All rights reserved.
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