LTC1708-PG_1 查看數據表（PDF） - Linear Technology

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LTC1708-PG_1

Dual Adjustable 5-Bit VID High Efficiency, 2-Phase Current Mode Synchronous Buck Regulator Controller

Linear Technology 

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OPERATIO (Refer to Functional Diagram)

Frequency Setting

The FREQSET pin provides frequency adjustment of the

internal oscillator from approximately 140kHz to 310kHz.

This input is nominally biased through an internal resistor

to the 1.19V reference, setting the oscillator frequency to

approximately 220kHz. This pin can be driven from an

external AC or DC signal source to control the instanta-

neous frequency of the oscillator.

INTVCC/EXTVCC Power

Power for the top and bottom MOSFET drivers and most

other internal circuitry is derived from the INTVCC pin.

When the EXTVCC pin is left open, an internal 5V low

dropout linear regulator supplies INTVCC power. If EXTVCC

is taken above 4.7V, the 5V regulator is turned off and an

internal switch is turned on connecting EXTVCC to INTVCC.

This allows the INTVCC power to be derived from a high

efficiency external source such as the output of the regu-

lator itself or a secondary winding, as described in the

Applications Information.

Standby Mode Pin

The STBYMD pin is a three-state input that controls

common circuitry within the IC as follows: When the

STBYMD pin is held at ground, both controller RUN/SS

pins are pulled to ground providing a single control pin to

shut down both controllers. When the pin is left open, the

internal RUN/SS currents are enabled to charge the

RUN/SS capacitor(s), allowing the turn-on of either con-

troller and activating necessary common internal biasing.

When the STBYMD pin is taken above 2V, both internal

linear regulators are turned on independent of the state on

the RUN/SS pins of the two switching regulator control-

lers, providing an output power source for “wake-up”

circuitry. Decouple the pin with a small capacitor (0.01µF)

to ground if the pin is not connected to a DC potential.

Output Overvoltage Protection

An overvoltage comparator, OV, guards against transient

overshoots (>7.5%) as well as other more serious condi-

tions that may overvoltage the output. In this case, the top

MOSFET is turned off and the bottom MOSFET is turned on

until the overvoltage condition is cleared.

LTC1708-PG

VID Control

Logic inputs VID0 to VID4 program an internal resistive

divider. The output voltage can be programmed in 50mV

and 25mV increments from 0.925V to 2.0V (see Table 1).

These logic input pins are internally pulled up to the

VIDVCC pin using separate internal series resistor/diode

paths. The diodes provide electrical isolation when the

logic pins are externally pulled up to a higher voltage

supply than VIDVCC.

Power Good (PGOOD)

The PGOOD pin is connected to an open drain of an internal

MOSFET. The MOSFET turns on when the outputs are not

both within ±7.5% of their nominal output levels as

determined by their feedback dividers. When both outputs

are within ±7.5% of their nominal values, the MOSFET is

turned off within 10µs and the pin is pulled up by an

external source

Foldback Current, Short-Circuit Detection

and Short-Circuit Latchoff

The RUN/SS capacitors are used initially to limit the inrush

current of each switching regulator. After the controller

has been started and been given adequate time to charge

up the output capacitors and provide full load current, the

RUN/SS capacitor is used in a short-circuit time-out

circuit. If the output voltage falls to less than 70% of its

nominal output voltage, the RUN/SS capacitor begins

discharging on the assumption that the output is in an

overcurrent and/or short-circuit condition. If the condition

lasts for a long enough period as determined by the size of

the RUN/SS capacitor, both controllers will be shut down

until the RUN/SS pin’s voltages are recycled. This built-in

latchoff can be overridden by providing a >5µA pull-up at

a compliance of 5V to the RUN/SS pin(s). This current

shortens the soft-start period but also prevents net dis-

charge of the RUN/SS capacitor(s) during an overcurrent

and/or short-circuit condition. Foldback current limiting is

also activated when the output voltage falls below 70% of

its nominal level whether or not the short-circuit latchoff

circuit is enabled. Even if a short is present and the short-

circuit latchoff is not enabled, a safe, low output current is

provided due to internal current foldback and actual power

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