AN-994-1 查看數據表（PDF） - International Rectifier
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AN-994-1 Datasheet PDF : 7 Pages
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IR Application Note –994 (Rev. 2)
Title: Maximizing the Effectiveness of Your SMD1
Assemblies
Topics Covered:
• Section I: How we Measure Rth (JA)
• Section II: Thermal Characterization of
Surface Mount Packages
• Section III: Attachment to board
• Section IV: Solder Pastes
• Section V: Heat Profiles
• Section VI: Rework
Section I: How we measure Rth (JA)
Herein is described the device mounting and heat
sinking used and the test methods employed to
measure Thermal Resistance of the various packages.
Standard printed circuit boards were developed to
which devices were solder-mounted for measuring
thermal resistance. FR-4 material with 2 oz. Cu was
used. Board dimension were 4.75 inches by 4.5 inches
and backside of board had full metal pattern. Three
different PCB metallization patterns
were tested: one with 1 sq inch of Cu area, the second
one
with Cu trace minimized so as to cover only as much
area
as taken up by the Device Under Test (DUT) and
necessary lead mounting pads (described as “modified
minimum pattern”), and the last one is the “absolute
minimum” pattern with the metallized area sized only
as needed to mount each lead. (See the figure 1.)
2 of 7
Thermal Resistance was measured according to
industry practice by first performing a reference
temperature estimate; a temperature sensitive
electrical parameter (TSEP) such as Vsd is measured
and compared with a calibration value to determine Tj.
Then a heating pulse of known power is applied
followed by a second TSEP measurement. That
measurement was compared to a calibration table to
estimate junction temperature and calculate the
temperature rise due to the heating pulse. From the
familiar equation:
∆T = RTH X PD
And where:
(equation 1)
∆T = TJ - TRef Temperature difference (C) between
junction temperature and reference temperature (here
ambient, case temperature or package lead),
RTH = Thermal Resistance (C/W) between junction and
reference point (again ambient, case temperature or
package lead),
PD = Power dissipated (W)
We can calculate the thermal resistance by plugging in
the measured values of temperature rise and power. In
this way measurements were taken on representative
samples of all packages listed in the table below.
Dut placed in the
middle of this pad
for Modified Minimum
Pattern Area Measurements
Dut placed in the
middle of this pad
for 1 Square Inch
Pattern Area Measurements
Dut placed in the
middle of this pad
for Minimum Pattern
Area Measurements
Board size 4.5 inches by 4.75 inches
Copper layer on the back
Figure 1.
1 This application note applies only to surface mountable type devices. Through-hole
devices such as TO-220, TO-247, Fulpak, etc are excluded and not covered by this note.
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