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STK672-740A-E 查看數據表(PDF) - ON Semiconductor

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STK672-740A-E Datasheet PDF : 19 Pages
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STK672-740A-E
[Configuration of I/O pins]
<Configuration of the φA, φAB, φB, φBB, ENABLE, and RESETB input pins>
Input pins13, 17, 12, 10, 15, and 14
5V
10kΩ
100kΩ
VSS
The input pins of this driver all use Schmitt input. Typical specifications at Tc=25°C are given below. Hysteresis
voltage is 0.3V (VIHa-VILa).
When rising
1.8V typ
Input voltage
VIHa
Input voltage specifications are as follows.
VIH=2.5V min
VIL=0.8V max
<Configuration of the FAULT input pin>
5V
Output pin
Pin 16
VSS
When falling
1.5V typ
VILa
<Configuration of the Vref input pin>
Vref/4.9
-
+
Amplifier
100kΩ
VSS
VSS
Input pin
Pin 19
The internal impedance, 100kΩ, is designed so that the increase in current is prevented while Pin 19 is open.
The recommended Vref voltage is 0.14V or higher because the output offset voltage of Vref/4.9 amplifier cannot be
controlled down to 0V
No. A1136-10/19

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