MAX3816ACUE 查看數據表（PDF） - Maxim Integrated

零件编号

产品描述 (功能)

生产厂家

MAX3816ACUE

I2C 2-Wire Extender for DDC in DVI, HDMI, and VGA Interfaces

Maxim Integrated 

I2C 2-Wire Extender for DDC in DVI,

HDMI, and VGA Interfaces

ABSOLUTE MAXIMUM RATINGS

Voltage Range (relative to VSS) at VDD, VCC,

CLOCK_D, DATA_D, CLOCK_C, DATA_C,

DRVR_EN, MODE ..................................................-0.5V to +6.0V

Continuous Power Dissipation (TA = +70°C)

(derate 11.1mW/°C above +70°C) ..............................889mW

Voltage Range (relative to VSS) at GND_REF .......-0.5V to +0.5V

Operating Junction Temperature (TJ) Range ....-55°C to +150°C

Storage Ambient Temperature (TS) Range .......-40°C to +150°C

Electrostatic Discharge (ESD)

Human Body Model......................................................> ±3kV

Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings only, and functional

operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to

absolute maximum rating conditions for extended periods may affect device reliability.

ELECTRICAL CHARACTERISTICS

(VCC = +3.0V to +5.5V, VDD = +3.0V to +5.5V, TA = 0°C to +70°C. Typical values are at TA = +25°C, VCC = +5.0V, VDD = +3.3V,

unless otherwise noted.)

PARAMETER

SYMBOL

CONDITIONS

POWER SUPPLY

Supply Voltage

VCC or VDD

See the Applications Information section

(Note 1)

Supply Current

Supply Noise Tolerance

VCC = 5.5V, VDD = 5.5V, 100kbps,

ICC

60pF load on cable, 10pF load on display,

current into VCC pin

VCC = 5.5V, VDD = 5.5V, 100kbps,

IDD

60pF load on cable, 10pF load on display,

current into VDD pin

DC to 500kHz

DC to 60Hz (series mode)

CLOCK_C, DATA_C, CLOCK_D, DATA_D (Notes 2, 3)

Output-High Voltage

Cable side (CLOCK_C, DATA_C)

VOH

Display side (CLOCK_D, DATA_D)

Output-Low Voltage

VOL

VHOLD

VOL achieved within 1μs of negative

transition (see Figure 1a, State 2)

After VOL is achieved, VHOLD is

the most positive level allowed

if logic level is 0 and no other

driver is asserting low on the

same node (series mode)

Cable

side

Display

side

High-to-Low Threshold

VTRIGIH

Threshold used to detect high-to-low

transition relative to supply (VCC for cable

side, VDD for display side)

Low-to-High Threshold

Output-High-State Current Limit

VTRIGIL

Threshold used to detect low-to-

high transition relative to supply

(VCC for cable side, VDD for

display side)

Cable

side

Display

side

Output in ramp-up mode for DATA_C

MIN TYP

3.0

1.3

4.3

100

700

VCC - 0.1 VCC

VDD - 0.1 VDD

0.2

15

20

75

12.5

17.5

5.0

MAX UNITS

5.5

V

3.0

mA

7.0

mVP-P

V

0.4

V

% of

Supply

% of

Supply

% of

Supply

16.5

mA

2 _______________________________________________________________________________________

Share Link: