AD7091R-2 查看數據表（PDF） - Analog Devices
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AD7091R-2 Datasheet PDF : 42 Pages
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AD7091R-2/AD7091R-4/AD7091R-8
Data Sheet
Pin No.
TSSOP
LFCSP
18
16
19
17
Mnemonic
SCLK
CONVST
20
18
VDRIVE
Not
21
applicable
EPAD
Description
Serial Clock. This pin acts as the serial clock input.
Convert Start Input Signal. Edge triggered logic input. The falling edge of CONVST places the
track-and-hold mode into hold mode and initiates a conversion.
Logic Power Supply Input. The voltage supplied at this pin determines at what voltage the
interface operates. Connect decoupling capacitors between VDRIVE and GND. Typical recommended
values are 10 µF and 0.1 µF. The voltage range on this pin is 1.8 V to 5.25 V and may be different
to the voltage range at VDD.
Exposed Pad. The exposed pad is not connected internally. It is recommended that the pad be
soldered to GND.
Rev. C | Page 10 of 42
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