AD7091R-2 查看數據表（PDF） - Analog Devices
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AD7091R-2 Datasheet PDF : 42 Pages
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Data Sheet
AD7091R-2/AD7091R-4/AD7091R-8
CS 1
24 VDRIVE
RESET 2
23 CONVST
VDD 3
REGCAP 4
22 SCLK
21 SDO
REFIN/REFOUT 5
20 SDI
GND 6 AD7091R-8 19 GND
TOP VIEW
MUXOUT 7 (Not to Scale) 18 ADCIN
VIN0 8
17 VIN1
VIN2 9
16 VIN3
ALERT/BUSY/GPO0 10
VIN4 11
VIN6 12
15 GPO1
14 VIN5
13 VIN7
Figure 9. 8-Channel, 24-Lead TSSOP Pin Configuration
VDD 1
REGCAP 2
REFIN/REFOUT 3
GND 4
MUXOUT 5
VIN0 6
AD7091R-8
TOP VIEW
(Not to Scale)
18 SDI
17 GND
16 ADCIN
15 VIN1
14 VIN3
13 GPO1
NOTES
1. THE EXPOSED PAD IS NOT CONNECTED
INTERNALLY. IT IS RECOMMENDED THAT
THE PAD BE SOLDERED TO GND.
Figure 10. 8-Channel, 24-Lead LFCSP Pin Configuration
Table 7. 8-Channel, 24-Lead LFCSP and 24-Lead TSSOP Pin Function Descriptions
Pin No.
TSSOP LFCSP Mnemonic
Description
1
23
CS
Chip Select Input. When CS is held low, the serial bus enables, and CS frames the output data
on the SPI.
2
24
RESET
Reset. Logic input.
3
1
VDD
4
2
REGCAP
Power Supply Input. The VDD range is from 2.7 V to 5.25 V. Decouple this supply pin to GND.
Decoupling Capacitor Pin for Voltage Output from Internal Regulator. Decouple this output pin
separately to GND using a 1.0 μF capacitor.
5
3
REFIN/REFOUT
6, 19
4, 17 GND
Voltage Reference Output, 2.5 V. Decouple this pin to GND. Typical recommended decoupling
capacitor value is 2.2 μF. The user can either access the internal 2.5 V reference or overdrive the
internal reference with the voltage applied to this pin. The reference voltage range for an
externally applied reference is 1.0 V to VDD.
Chip Ground Pins. These pins are the ground reference point for all circuitry on the AD7091R-8.
7
5
MUXOUT
Multiplexer Output. The output of the multiplexer appears at this pin. If no external filtering or
buffering is required, tie this pin directly to the ADCIN pin; otherwise, tie the output of the
conditioning network to the ADCIN pin.
8
6
VIN0
Analog Input 0. Single-ended analog input. The analog input range is 0 V to VREF.
9
7
VIN2
Analog Input 2. Single-ended analog input. The analog input range is 0 V to VREF.
10
8
ALERT/BUSY/GPO0 Alert Output Pin (ALERT). This is a multifunction pin determined by the configuration register.
When functioning as ALERT, this pin is a logic output indicating that a conversion result has
fallen outside the limit of the register settings.
When the ALERT/BUSY/GPO0 pin is configured as a BUSY output, use this pin to indicate when a
conversion is taking place.
The pin can also function as a general-purpose digital output.
11
9
VIN4
12
10
VIN6
13
11
VIN7
Analog Input 4. Single-ended analog input. The analog input range is 0 V to VREF.
Analog Input 6. Single-ended analog input. The analog input range is 0 V to VREF.
Analog Input 7. Single-ended analog input. The analog input range is 0 V to VREF.
14
12
VIN5
Analog Input 5. Single-ended analog input. The analog input range is 0 V to VREF.
15
13
GPO1
16
14
VIN3
17
15
VIN1
18
16
ADCIN
General-Purpose Digital Output.
Analog Input 3. Single-ended analog input. The analog input range is 0 V to VREF.
Analog Input 1. Single-ended analog input. The analog input range is 0 V to VREF.
ADC Input. This pin allows access to the on-chip track-and-hold. If no external filtering or
buffering is required, tie this pin directly to the MUXOUT pin; otherwise, tie the input of the
conditioning network to the MUXOUT pin.
Rev. C | Page 11 of 42
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