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STP4N80K5(2013) 查看數據表(PDF) - STMicroelectronics

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STP4N80K5 Datasheet PDF : 23 Pages
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STD4N80K5, STF4N80K5, STP4N80K5, STU4N80K5
Electrical characteristics
Symbol
Table 6. Switching times
Parameter
Test conditions
td(on)
tr
td(off)
tf
Turn-on delay time
Rise time
Turn-off-delay time
Fall time
VDD = 400 V, ID = 1.5 A,
RG = 4.7 Ω, VGS = 10 V
(see Figure 18)
Min. Typ. Max. Unit
- 16.5 - ns
- 15 - ns
- 36 - ns
- 21 - ns
Symbol
Table 7. Source drain diode
Parameter
Test conditions
ISD
(1)
ISDM
(2)
VSD
Source-drain current
Source-drain current (pulsed)
Forward on voltage
ISD = 3 A, VGS = 0
trr
Qrr
IRRM
Reverse recovery time
Reverse recovery charge
Reverse recovery current
ISD = 3 A, di/dt = 100 A/μs
VDD= 60 V TJ = 25 °C
(see Figure 20)
trr
Qrr
IRRM
Reverse recovery time
Reverse recovery charge
Reverse recovery current
ISD = 3 A, di/dt = 100 A/μs
VDD= 60 V TJ = 150 °C
(see Figure 20)
1. Pulse width limited by safe operating area
2. Pulsed: pulse duration = 300 μs, duty cycle 1.5%
Min. Typ. Max. Unit
-
3A
12 A
-
1.5 V
- 242
ns
- 1.42
μC
- 12
A
- 373
ns
- 1.98
μC
- 10.5
A
Symbol
Table 8. Gate-source Zener diode
Parameter
Test conditions
Gate-source breakdown
V(BR)GSO voltage
IGS= ± 1 mA, ID=0
Min. Typ. Max. Unit
30
-
V
The built-in back-to-back Zener diodes have specifically been designed to enhance not only
the device’s ESD capability, but also to make them safely absorb possible voltage transients
that may occasionally be applied from gate to source. In this respect the Zener voltage is
appropriate to achieve an efficient and cost-effective intervention to protect the device’s
integrity. These integrated Zener diodes thus avoid the usage of external components.
DocID025105 Rev 2
5/23
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