WM8782A 查看數據表（PDF） - Cirrus Logic

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WM8782A

24-Bit, 192kHz Stereo ADC

Cirrus Logic 

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DIGITAL AUDIO INTERFACE

The digital audio interface uses three pins:

• DOUT: ADC data output

• LRCLK: ADC data alignment clock

• BCLK: Bit clock, for synchronisation

WM8782A

The digital audio interface takes the data from the internal ADC digital filters and places it on DOUT

and LRCLK. DOUT is the formatted digital audio data stream output from the ADC digital filters with

left and right channels multiplexed together. LRCLK is an alignment clock that controls whether Left

or Right channel data is present on the DOUT line. DOUT and LRCLK are synchronous with the

BCLK signal with each data bit transition signified by a BCLK high to low transition. DOUT is always

an output. BCLK and LRCLK are always inputs.

Three different audio data formats are supported:

• Left justified

• Right justified

•

I2S

SLAVE MODE OPERATION

The WM8782A can be configured as a slave mode device. In slave mode, the WM8782A responds

with data to clocks it receives over the digital audio interface. The mode is selected by setting the MS

input pin (see Table 3 Slave selection below). Slave mode is illustrated below.

Figure 4 Slave Mode

PIN

DESCRIPTION

M/S

Slave Selection

0 = Slave Mode

1= Reserved

Table 3 Slave selection

AUDIO INTERFACE CONTROL

The Input Word Length and Audio Format mode can be selected by using IWL and FORMAT pins.

PIN

DESCRIPTION

IWL

Word Length

0 = 16 bit

1 = 20 bit

Z = 24 bit

FORMAT

Audio Mode Select

0 = RJ

1 = LJ

Z = I2S

Table 4 Audio Data Format Control

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PD, April 2010, Rev 4.8

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