WM8782A 查看數據表（PDF） - Cirrus Logic
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WM8782A Datasheet PDF : 20 Pages
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WM8782A
PIN DESCRIPTION
PIN NO.
1
2
3
4
5
6
7
NAME
MCLK
DOUT
LRCLK
DGND
DVDD
BCLK
IWL
8
FSAMPEN
9
FORMAT
10
VMID
11
VREFGND
12
VREFP
13
AVDD
14
AGND
15
AINOPR
16
AINR
17
COM
18
AINOPL
19
AINL
20
M/S
Production Data
TYPE
DESCRIPTION
Digital Input
Digital Output
Digital Input
Supply
Supply
Digital Input
Digital Tristate Input
Digital Tristate Input
Digital Tristate Input
Analogue Output
Supply
Analogue Output
Supply
Supply
Analogue Output
Analogue Input
Analogue Input
Analogue Output
Analogue Input
Digital Input
Master Clock
ADC Digital Audio Data
Audio Interface Left / Right Clock
Digital Negative Supply
Digital Positive Supply
Audio Interface Bit Clock
Word Length
0 = 16 bit
1 = 20 bit
Z = 24 bit
Fast Sampling Rate Enable
0 = 48kHz
1= 96kkHz
Z= 192kHz
Audio Mode Select
0 = RJ
1 = LJ
Z = I2S
Mid rail Voltage Decoupling Capacitor
Negative Supply and Substrate Connection
Positive Reference Voltage Decoupling Pin; 10uF external decoupling
Analogue Positive Supply
Analogue Negative Supply and Substrate Connection
Right Channel Internal Op-Amp Output
Right Channel Input
Common mode high impedance input should be set to midrail.
Left Channel Internal Op-Amp Output
Left Channel Input
Interface Mode Select
0 = Slave mode (128fs, 192fs, 256fs, 384fs, 512fs, 768fs)
1 = Reserved
(fs=word clock frequency)
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PD, April 2010, Rev 4.8
4
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