BR93LL46F 查看數據表（PDF） - ROHM Semiconductor
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BR93LL46F Datasheet PDF : 11 Pages
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Memory ICs
BR93LL46F / BR93LL46FV
•Electrical characteristics (unless otherwise noted, Ta = – 20 to + 70°C, VCC = 1.8 to 4.0V)
Parameter
Symbol Min. Typ. Max. Unit
Conditions
Input low level voltage
Input high level voltage
Output low level voltage 1
0.2
VIL
– 0.3
—
× VCC
V
—
0.8
VCC +
VIH
× VCC
—
0.3
V
—
VOL1
—
—
0.3
V
IOL = 1.0mA
Output low level voltage 2
VOL2
—
—
0.2
V
IOL = 20µA
Output high level voltage 2
Input leakage current
VCC –
VOH2
0.3
—
—
V
IOH = 100µA
ILI
– 1.0
—
1.0
µA VIN = 0V ~ VCC
Output leakage current
ILO
– 1.0
—
1.0
µA VOUT = 0V ~ VCC, CS = GND
Operating current dissipation 1
Operating current dissipation 2
VIN = VIH / VIL, DO = OPEN, fSK = 250kHz
ICC1
—
0.5
1.0
mA WRITE
ICC2
—
0.4
1.0
mA VIN = VIH / VIL, DO = OPEN, fSK = 250kHz, READ
Standby current
ISB
—
0.4
1.0
µA CS = SK = DI = GND, DO = OPEN
∗1 About the operating current dissipation
ICC1 indicates the average current dissipation during a writing operation, and ICC2 indicates the average current dissipation during a reading operation.
Because this is internal logic switching current, it changes based on the SK frequency.
∗2 About the standby current
This is the current dissipation when all inputs are CMOS level and in static state.
•Operation timing characteristics (Ta = – 20 to + 70°C, VCC = 1.8 to 4.0 V)
Parameter
Symbol Min.
Typ. Max.
Unit
SK clock frequency
fSK
—
—
250
kHz
SK "H" time
tSKH
1
—
—
µs
SK "L" time
tSKL
1
—
—
µs
CS "L" time
tCS
1
—
—
µs
CS setup time
tCSS
200
—
—
ns
DI setup time
tDIS
400
—
—
ns
CS hold time
tCSH
0
—
—
ns
DI hold time
tDIH
400
—
—
ns
Data "1" output delay time
tPD1
—
—
2
µs
Data "0" output delay time
tPD0
—
—
2
µs
Time from CS to output confirmation
tSV
—
—
2
µs
Time from CS to output High impedance
tDF
—
—
400
ns
Write cycle time
tE / W
—
—
25
ms
3
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