AN28F010-120 查看數據表（PDF） - Intel
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AN28F010-120 Datasheet PDF : 23 Pages
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A28F010
Bus
Operation
Command
Comments
Standby
Wait for VPP Ramp to VPPH(1)
Initialize Pulse-Count
Write
Write
Set-up
Program
Program
Data e 40H
Valid Address Data
Standby
Write
Standby
Read
Program(3)
Verify
Duration of Program
Operation (tWHWH1)
Data e C0H Stops Program
Operation(2)
tWHGL
Read Byte to Verify
Programming
Standby
Compare Data Output to Data
Expected
Write
Read
Standby
Data e 00H Resets the
Register for Read Operations
Wait for VPP Ramp to VPPL(1)
290266 – 5
NOTES
1 See DC Characteristics for value of VPPH The VPP
power supply can be hard-wired to the device or
switchable When VPP is switched VPPL may be
ground no-connect with a resistor tied to ground or
less than 6 5V Refer to Principles of Operation
2 Refer to Principles of Operation
3 Program Verify is only performed after byte program-
ming A final read compare may be performed (option-
al) after the register is written with the Read command
4 CAUTION The algorithm MUST BE FOLLOWED
to ensure proper and reliable operation of the de-
vice
Figure 4 28F010 Quick-Pulse Programming Algorithm
10
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