NTE21128 查看數據表（PDF） - NTE Electronics
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NTE21128 Datasheet PDF : 6 Pages
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AC Characteristics (Program, Program Verify, and Program Inhibit Modes):
(TA = +25° ±5°C, VCC = +5V ±5%, VPP = +21V ±0.5V)
Parameter
Symbol
Test Conditions
Min Typ Max Unit
Address Setup Time
E Setup Time
Data Setup Time
Address Hold Time
tAS Input Pulse Levels = 0.45V to 2.4V,
Input Timing Reference
tOES Level = 0.8V and 2V,
tDS
Output Timing Reference
Level = 0.8V and 2V,
tAH Input Rise and Fall Times: 20ns
2 – – µs
2 – – µs
2 – – µs
0 – – µs
E Setup Time
tCES
2 – – µs
Data Hold Time
tDH
2 – – µs
Chip Enable to Output Float Delay tDF
0 – 130 ns
Data Valid from E
tOE
– – 150 ns
Program Pulse Width (Note 3)
tPW
45 50 55 ms
VPP Setup Time
tVS
2 – – µs
Note 3. Initial Program Pulse width tolerance is 1msec ±5%.
Test Conditions:
Input Pulse Levels: 0.45V to 2.4V
Input Timing Reference Level: 0.8V and 2.0V
Output Timing Reference Level: 0.8V and 2.0V
Input Rise and Fall Times: 20ns
Capacitance: (TA = +25°C, f = 1MHz)
Parameter
Symbol
Test Conditions
Input Capacitance
Output Capacitance
CIN
COUT
VIN = 0V
VOUT = 0V
Min Typ Max Unit
– 4 8 pF
– 8 14 pF
Device Operation:
A single 5V power supply is required in the read mode. All inputs are TTL levels except for VPP.
Read Mode
The NTE21128 has the following two control functions: Chip Enable (E) is the power control used for
device selection and Output Enable (G) is the output control used to gate data to the output pins, inde-
pendent of device selection.
Address access time (tAVQV) is equal to the delay from E to output (tELQV). Data is available at the
outputs after the falling edge of G, assuming that E has been low and the addresses have been stable
for at least tAVQV – tGLQV.
Standby Mode
The standby mode, reducing the maximum active power current from 85mA to 40mA, is achieved by
applying a TTL high signal to the E input. When in the standby mode, the outputs are in a high imped-
ance state, independent of the G input.
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