73S1210F-68MR/F/PJ 查看數據表（PDF） - Teridian Semiconductor Corporation

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73S1210F-68MR/F/PJ

Self-Contained Smart Card Reader with PINpad and Power Management

Teridian Semiconductor Corporation 

73S1210F Data Sheet

1 Hardware Description

1.1 Pin Description

Table 1: 73S1210 Pinout Description

DS_1210F_001

Pin Name

Description

X12IN

10 9

X12OUT 11 10

ROW(5:0)

0

21

1

22

2

24

3

33

4

36

5

37

COL(4:0)

0

12

1

13

2

14

3

16

4

19

USR(7:0)

0

35 22

1

34 21

2

32 20

3

31 19

4

30 18

5

29 17

6

23 14

7

20 13

SCL

56

SDA

67

RXD

TXD

INT3

INT2

SIO

SCLK

8

17 11

18 12

48 30

49 31

47 29

45 28

I Figure 26 MPU clock crystal oscillator input pin. A 1MΩ resistor is

required between pins X12IN and X12OUT.

O Figure 26 MPU clock crystal oscillator output pin.

I Figure 34 Keypad row input sense.

O Figure 35 Keypad column output scan pins.

IO Figure 30 General-purpose user pins, individually configurable as

inputs or outputs or as external input interrupt ports.

O Figure 29 I2C (master mode) compatible Clock signal. Note: the pin

is configured as an open drain output. When the I2C

interface is being used, an external pull up resistor is

required. A value of 3K is recommended.

IO Figure 28 I2C (master mode) compatible data I/O. Note: this pin is bi-

directional. When the pin is configured as output, it is an

open drain output. When the I2C interface is being used,

an external pull up resistor is required. A value of 3K is

recommended.

I Figure 32 Serial UART Receive data pin.

O Figure 29 Serial UART Transmit data pin.

I Figure 32 General purpose interrupt input.

I Figure 32 General purpose interrupt input.

IO Figure 28 IO data signal for use with external Smart Card interface

circuit such as 73S8010.

O Figure 29 Clock signal for use with external Smart Card interface

circuit.

Rev. 1.4

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