2N06L50 查看數據表（PDF） - Infineon Technologies
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2N06L50 Datasheet PDF : 9 Pages
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IPG20N06S2L-50
Parameter
Dynamic characteristics2)
Input capacitance4)
Output capacitance4)
Reverse transfer capacitance4)
Turn-on delay time
Rise time
Turn-off delay time
Fall time
Gate Charge Characteristics2, 4)
Gate to source charge
Gate to drain charge
Gate charge total
Gate plateau voltage
Reverse Diode
Diode continous forward current2)
one channel active
Diode pulse current2)
one channel active
Diode forward voltage
Reverse recovery time2)
Symbol
Conditions
C iss
C oss
Crss
t d(on)
tr
t d(off)
tf
V GS=0 V, V DS=25 V,
f =1 MHz
V DD=27.5 V,
V GS=10 V, I D=20 A,
R G=11 Ω
Q gs
Q gd
V DD=44 V, I D=20 A,
Qg
V GS=0 to 10 V
V plateau
IS
I S,pulse
T C=25 °C
V SD
V GS=0 V, I F=15 A,
T j=25 °C
t rr
V R=27.5 V, I F=I S,
di F/dt =100 A/µs
min.
Values
typ.
Unit
max.
-
430
560 pF
-
120
160
-
45
68
-
2
- ns
-
3
-
-
15
-
-
10
-
-
1.5
2 nC
-
4.6
6.9
-
13
17
-
3.7
-V
-
-
20 A
-
-
80
-
1.0
1.3 V
-
25
- ns
Reverse recovery charge2, 4)
Q rr
-
24
- nC
1) Current is limited by bondwire; with an R thJC =2.9 K/W the chip is able to carry 23A at 25°C.
2) Specified by design. Not subject to production test.
3) Device on 40 mm x 40 mm x 1.5 mm epoxy PCB FR4 with 6 cm2 (one layer, 70 µm thick) copper area for drain
connection. PCB is vertical in still air.
4) Per channel
Rev. 1.0
page 3
2009-09-07
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