EFM32LG360F64G-E-CSP81 查看數據表（PDF） - Unspecified
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EFM32LG360F64G-E-CSP81 Datasheet PDF : 466 Pages
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3.2 Configuration Summary
EFM32LG Data Sheet
System Summary
3.2.1 EFM32LG230
The features of the EFM32LG230 is a subset of the feature set described in the EFM32LG Reference Manual. The following table de-
scribes device specific implementation of the features.
Table 3.1. EFM32LG230 Configuration Summary
Module
Cortex-M3
DBG
MSC
DMA
RMU
EMU
CMU
WDOG
PRS
I2C0
I2C1
USART0
USART1
USART2
LEUART0
LEUART1
TIMER0
TIMER1
TIMER2
TIMER3
RTC
BURTC
LETIMER0
PCNT0
PCNT1
PCNT2
ACMP0
ACMP1
VCMP
ADC0
DAC0
Configuration
Full configuration
Full configuration
Full configuration
Full configuration
Full configuration
Full configuration
Full configuration
Full configuration
Full configuration
Full configuration
Full configuration
Full configuration with IrDA
Full configuration with I2S
Full configuration with I2S
Full configuration
Full configuration
Full configuration with DTI
Full configuration
Full configuration
Full configuration
Full configuration
Full configuration
Full configuration
Full configuration, 16-bit count register
Full configuration, 8-bit count register
Full configuration, 8-bit count register
Full configuration
Full configuration
Full configuration
Full configuration
Full configuration
Pin Connections
NA
DBG_SWCLK, DBG_SWDIO, DBG_SWO
NA
NA
NA
NA
CMU_OUT0, CMU_OUT1
NA
NA
I2C0_SDA, I2C0_SCL
I2C1_SDA, I2C1_SCL
US0_TX, US0_RX. US0_CLK, US0_CS
US1_TX, US1_RX, US1_CLK, US1_CS
US2_TX, US2_RX, US2_CLK, US2_CS
LEU0_TX, LEU0_RX
LEU1_TX, LEU1_RX
TIM0_CC[2:0], TIM0_CDTI[2:0]
TIM1_CC[2:0]
TIM2_CC[2:0]
TIM3_CC[2:0]
NA
NA
LET0_O[1:0]
PCNT0_S[1:0]
PCNT1_S[1:0]
PCNT2_S[1:0]
ACMP0_CH[7:0], ACMP0_O
ACMP1_CH[7:0], ACMP1_O
NA
ADC0_CH[7:0]
DAC0_OUT[1:0], DAC0_OUTxALT
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