NLAS4053DR2 查看數據表（PDF） - ON Semiconductor
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NLAS4053DR2 Datasheet PDF : 14 Pages
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NLAS4053
Analog Multiplexer/
Demultiplexer
Triple 2:1 Analog Switch−Multiplexer
Improved Process, Sub−Micron Silicon
Gate CMOS
The NLAS4053 is an improved version of the MC14053 and
MC74HC4053 fabricated in sub−micron Silicon Gate CMOS
technology for lower RDS(on) resistance and improved linearity with
low current. This device may be operated either with a single supply or
dual supply up to ±3.0 V to pass a 6 VPP signal without coupling
capacitors.
When operating in single supply mode, it is only necessary to tie
VEE, pin 7 to ground. For dual supply operation, VEE is tied to a
negative voltage, not to exceed maximum ratings. Pin for pin
compatible with all industry standard versions of ‘4053.’
Features
• Improved RDS(on) Specifications
• Pin for Pin Replacement for MAX4053 and MAX4053A
− One Half the Resistance Operating at 5.0 Volts
• Single or Dual Supply Operation
− Single 3−5 Volt Operation, or Dual ±3.0 Volt Operation
− With VCC of 3.0 to 3.3 V, Device Can Interface with 1.8 V Logic,
− No Translators Needed
− Address and Inhibit Pins are Over−Voltage Tolerant and May Be
− Driven Up +6.0 V Regardless of VCC
− Greatly Improved Noise Margin Over MAX4053 and MAX4053A
• Improved Linearity Over Standard HC4053 Devices
• Popular SOIC and the Space Saving TSSOP Packages
• Pb−Free Packages are Available*
http://onsemi.com
MARKING
DIAGRAMS
SOIC−16
D SUFFIX
CASE 751B
16
NLAS4053G
AWLYWW
1
TSSOP−16
DT SUFFIX
CASE 948F
16
NLAS
4053
ALYWG
G
1
A
= Assembly Location
L, WL = Wafer Lot
Y
= Year
W, WW = Work Week
G
= Pb−Free Package
G
= Pb−Free Package
(Note: Microdot may be in either location)
ORDERING INFORMATION
See detailed ordering and shipping information in the package
dimensions section on page 4 of this data sheet.
*For additional information on our Pb−Free strategy and soldering details, please
download the ON Semiconductor Soldering and Mounting Techniques
Reference Manual, SOLDERRM/D.
© Semiconductor Components Industries, LLC, 2005
1
November, 2005 − Rev. 2
Publication Order Number:
NLAS4053/D
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