HEF4060B 查看數據表（PDF） - NXP Semiconductors.
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HEF4060B Datasheet PDF : 15 Pages
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NXP Semiconductors
HEF4060B
14-stage ripple-carry binary counter/divider and oscillator
Table 8. Power dissipation
Dynamic power dissipation PD and total power dissipation Ptot can be calculated from the formulas shown. Tamb = 25 C.
Symbol Parameter
Conditions VDD Typical formula for PD and Ptot (W)[1]
PD
dynamic power per device
5 V PD = 700 fi + (fo CL) VDD2
dissipation
10 V PD = 3300 fi + (fo CL) VDD2
15 V PD = 8900 fi + (fo CL) VDD2
Ptot
total power
dissipation
when using
the on-chip
oscillator
5V
10 V
15 V
Ptot = 700 fosc + (fo CL) VDD2 + 2 Ct VDD2 fosc + 690 VDD
Ptot = 3300 fosc + (fo CL) VDD2 + 2 Ct VDD2 fosc + 6900 VDD
Ptot = 8900 fosc + (fo CL) VDD2 + 2 Ct VDD2 fosc + 22000 VDD
[1] Where:
fi = input frequency in MHz; fo = output frequency in MHz;
CL = output load capacitance in pF;
VDD = supply voltage in V;
(fo CL) = sum of the outputs;
Ct = timing capacitance (pF);
fosc = oscillator frequency (MHz).
11. Waveforms
tr
tf
MR input
10 %
90 %
VM
tW
trec
1/fmax
RS input
VM
tPHL
Qn output
VM
10 %
tPLH
90 %
tt
tW
tt
tPHL
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Measurement points are given in Table 9.
Fig 4. Waveforms showing propagation delays for MR to Qn and CP to Q0, minimum MR, and CP pulse widths
Table 9. Measurement points
Supply voltage
VDD
5 V to 15 V
Input
VM
0.5VDD
Output
VM
0.5VDD
HEF4060B
Product data sheet
All information provided in this document is subject to legal disclaimers.
Rev. 7 — 16 November 2011
© NXP B.V. 2011. All rights reserved.
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