5962-8863401UC 查看數據表（PDF） - Intersil
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5962-8863401UC Datasheet PDF : 17 Pages
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X28HC256
Read Cycle
tRC
ADDRESS
tCE
CE
tOE
OE
VIH
WE
DATA I/O
HIGH Z
tOLZ
tLZ
tOH
DATA VALID
tHZ
DATA VALID
tOHZ
tAA
NOTES:
4. tLZ min., tHZ, tOLZ min. and tOHZ are periodically sampled and not 100% tested, tHZ and tOHZ are measured with CL = 5pF, from the point when
CE, OE return HIGH (whichever occurs first) to the time when the outputs are no longer driven.
5. For faster 256k products, refer to X28VC256 product line.
Write Cycle Limits
PARAMETER
SYMBOL
MIN
TYP
(Note 6)
MAX
UNIT
Write Cycle Time
tWC (Note 7)
3
5
ms
Address Setup Time
tAS
0
ns
Address Hold Time
tAH
50
ns
Write Setup Time
tCS
0
ns
Write Hold Time
tCH
0
ns
CE Pulse Width
tCW
50
ns
OE HIGH Setup Time
tOES
0
ns
OE HIGH Hold Time
tOEH
0
ns
WE Pulse Width
tWP
50
ns
WE HIGH Recovery (page write only)
tWPH (Note 8)
50
ns
Data Valid
tDV
1
µs
Data Setup
tDS
50
ns
Data Hold
tDH
0
ns
Delay to Next Write After Polling is True
tDW (Note 8)
10
µs
Byte Load Cycle
tBLC
0.15
100
µs
NOTES:
6. Typical values are for TA = +25°C and nominal supply voltage.
7. tWC is the minimum cycle time to be allowed from the system perspective unless polling techniques are used. It is the maximum time the device
requires to automatically complete the internal write operation.
8. tWPH and tDW are periodically sampled and not 100% tested.
11
FN8108.3
September 21, 2011
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