74AHCT157PW-Q100 查看數據表（PDF） - NXP Semiconductors.

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74AHCT157PW-Q100

Quad 2-input multiplexer

NXP Semiconductors. 

Nexperia

74AHC157-Q100; 74AHCT157-Q100

Quad 2-input multiplexer

tW

VI 90 %

negative

pulse

VM

10 %

0V

tf

VI

positive

pulse

tr

90 %

VM

10 %

0V

tW

VM

tr

tf

VM

VI

G

VCC

VO

DUT

RT

VCC

RL S1

CL

open

001aad983

Test data is given in Table 9.

Definitions test circuit:

RT = Termination resistance should be equal to output impedance Zo of the pulse generator

CL = Load capacitance including jig and probe capacitance

RL = Load resistor

S1 = Test selection switch

Fig 9. Load circuitry for switching times

Table 9. Test data

Type

Input

VI

74AHC157-Q100 VCC

74AHCT157-Q100 3.0 V

tr, tf

3.0 ns

3.0 ns

Load

CL

15 pF, 50 pF

15 pF, 50 pF

RL

1 k

1 k

S1 position

tPHL, tPLH

open

open

tPZH, tPHZ

GND

GND

tPZL, tPLZ

VCC

VCC

74AHC_AHCT157_Q100

Product data sheet

All information provided in this document is subject to legal disclaimers.

Rev. 1 — 4 July 2013

© Nexperia B.V. 2017. All rights reserved

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