74HCT109DB,118 查看數據表（PDF） - NXP Semiconductors.
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74HCT109DB,118 Datasheet PDF : 19 Pages
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Nexperia
74HC109; 74HCT109
Dual JK flip-flop with set and reset; positive-edge-trigger
Table 7. Dynamic characteristics …continued
Voltages are referenced to GND (ground = 0 V); CL = 50 pF unless otherwise specified; for test circuit, see Figure 8.
Symbol Parameter Conditions
25 C
40 C to +85 C 40 C to +125 C
Min Typ[1] Max Min
Max
Min
Max
CPD
power
CL = 50 pF; f = 1 MHz; [4] -
22
-
-
-
-
-
dissipation VI = GND to VCC 1.5 V
capacitance
Unit
pF
[1] All typical values are measured at Tamb = 25 C.
[2] tpd is the same as tPLH and tPHL.
[3] tt is the same as tTHL and tTLH.
[4] CPD is used to determine the dynamic power dissipation (PD in W).
PD = CPD VCC2 fi N + (CL VCC2 fo) where:
fi = input frequency in MHz;
fo = output frequency in MHz;
CL = output load capacitance in pF;
VCC = supply voltage in V;
N = number of inputs switching;
(CL VCC2 fo) = sum of outputs.
11. Waveforms
9,
Q-Q.LQSXW
*1'
9,
Q&3LQSXW
*1'
92+
Q4RXWSXW
92/
92+
Q4RXWSXW
92/
90
WK
WVX
IPD[
WK
WVX
90
W:
W3+/
90
W3/+
90
W7+/
W7/+
W3+/
W3/+
W7/+
W7+/
DDD
Fig 6.
Measurement points are given in Table 8.
VOL and VOH are typical voltage output levels that occur with the output load.
Clock propagation delays, output transition time, pulse width, set-up, hold times, and maximum
frequency
74HC_HCT109
Product data sheet
All information provided in this document is subject to legal disclaimers.
Rev. 3 — 1 August 2016
© Nexperia B.V. 2017. All rights reserved
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