74HCT109PW,112 查看數據表（PDF） - NXP Semiconductors.

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74HCT109PW,112

Dual JK flip-flop with set and reset; positive-edge-trigger

NXP Semiconductors. 

Nexperia

74HC109; 74HCT109

Dual JK flip-flop with set and reset; positive-edge-trigger

3. Ordering information

Table 1. Ordering information

Type number Package

Temperature range Name

Description

Version

74HC109D 40 C to +125 C SO16

plastic small outline package; 16 leads; body width 3.9 mm SOT109-1

74HCT109D

74HC109DB 40 C to +125 C

74HCT109DB

SSOP16 plastic shrink small outline package; 16 leads;

body width 5.3 mm

SOT338-1

74HCT109PW 40 C to +125 C TSSOP16 plastic thin shrink small outline package; 16 leads;

body width 4.4 mm

SOT403-1

4. Functional diagram

 

6' 6'

6'





-

-

-

4 

4 4 









&3 &3

&3

.

.

))

4

4

.

4

5'





5' 5'

 

PQD

Fig 1. Logic symbol

6

 -



&

 .

5

 6





-





&





.



 5

D

Fig 2. IEC logic symbol

E

PQD

&

&

.

-

&

&

6

5

&3

&

&

Fig 3. Logic diagram (one flip-flop)

4

&

&

4

&

&

DDD

74HC_HCT109

Product data sheet

All information provided in this document is subject to legal disclaimers.

Rev. 3 — 1 August 2016

© Nexperia B.V. 2017. All rights reserved

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