74HCT109 查看數據表（PDF） - NXP Semiconductors.
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74HCT109 Datasheet PDF : 19 Pages
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Nexperia
74HC109; 74HCT109
Dual JK flip-flop with set and reset; positive-edge-trigger
Table 7. Dynamic characteristics …continued
Voltages are referenced to GND (ground = 0 V); CL = 50 pF unless otherwise specified; for test circuit, see Figure 8.
Symbol Parameter Conditions
25 C
40 C to +85 C 40 C to +125 C
Min Typ[1] Max Min
Max
Min
Max
74HCT109
tpd
propagation nCP to nQ, nQ;
[2]
delay
see Figure 6
VCC = 4.5 V
- 20 35
-
44
-
53
VCC = 5 V; CL = 15 pF
- 17 -
-
-
-
tPLH
LOW to HIGH nSD to nQ, see Figure 7
propagation
delay
VCC = 4.5 V
- 13 26
-
33
-
39
VCC = 5 V; CL = 15 pF
- 14 -
-
-
-
-
tPHL
HIGH to LOW nSD to nQ; see Figure 7
propagation
delay
VCC = 4.5 V
- 19 35
-
44
-
53
VCC = 5 V; CL = 15 pF
- 14 -
-
-
-
-
tPHL
HIGH to LOW nRD to nQ; see Figure 7
propagation
delay
VCC = 4.5 V
- 19 35
-
44
-
53
VCC = 5 V; CL = 15 pF
- 15 -
-
-
-
-
tPLH
LOW to HIGH nRD to nQ; see Figure 7
propagation
delay
VCC = 4.5 V
- 16 32
-
40
-
48
VCC = 5 V; CL = 15 pF
- 15 -
-
-
-
-
tt
transition
nQ, nQ; see Figure 6
[3]
time
VCC = 4.5 V
-
7 15
-
19
-
22
tW
pulse width nCP HIGH or LOW;
see Figure 6
VCC = 4.5 V
18 9
-
23
-
27
-
nSD, nRD HIGH or LOW;
see Figure 7
VCC = 4.5 V
16 8
-
20
-
24
-
trec
recovery time nSD, nRD to nCP;
see Figure 7
VCC = 4.5 V
16 8
-
20
-
24
-
tsu
set-up time nJ and nK to nCP;
see Figure 6
VCC = 4.5 V
18 8
-
23
-
27
-
th
hold time
nJ and nK to nCP;
see Figure 6
VCC = 4.5 V
3 3 -
3
-
3
-
fmax
maximum
nCP; see Figure 6
frequency
VCC = 4.5 V
27 55 -
22
-
18
-
VCC = 5 V; CL = 15 pF
- 61 -
-
-
-
-
Unit
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
MHz
MHz
74HC_HCT109
Product data sheet
All information provided in this document is subject to legal disclaimers.
Rev. 3 — 1 August 2016
© Nexperia B.V. 2017. All rights reserved
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