74HC157PW-Q100 查看數據表（PDF） - NXP Semiconductors.
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74HC157PW-Q100 Datasheet PDF : 17 Pages
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74HC157-Q100; 74HCT157-Q100
Quad 2-input multiplexer
Rev. 2 — 21 January 2015
Product data sheet
1. General description
The 74HC157-Q100; 74HCT157-Q100 is a high-speed Si-gate CMOS device and is pin
compatible with Low-power Schottky TTL. It is specified in compliance with JEDEC
standard no. 7A.
The 74HC/HCT157-Q100 are quad 2-input multiplexers which select 4 bits of data from
two sources under the control of a common data select input (S). The enable input (E) is
active LOW. When E is HIGH, all of the outputs (1Y to 4Y) are forced LOW regardless of
all other input conditions.
Moving the data from two groups of registers to four common output buses is a common
use of the 74HC/HCT157-Q100. The state of the common data select input (S)
determines the particular register from which the data comes. It can also be used as
function generator. The device is useful for implementing highly irregular logic by
generating any four of the 16 different functions of two variables with one variable
common. The 74HC/HCT157-Q100 is logic implementation of a 4-pole, 2-position switch,
where the position of the switch is determined by the logic levels applied to S.
The logic equations are:
1Y = E (1I1 S + 1I0 S)
2Y = E (2I1 S + 2I0 S)
3Y = E (3I1 S + 3I0 S)
4Y = E (4I1 S + 4I0 S)
This product has been qualified to the Automotive Electronics Council (AEC) standard
Q100 (Grade 1) and is suitable for use in automotive applications.
2. Features and benefits
Automotive product qualification in accordance with AEC-Q100 (Grade 1)
Specified from 40 C to +85 C and from 40 C to +125 C
Low-power dissipation
Non-inverting data path
ESD protection:
MIL-STD-883, method 3015 exceeds 2000 V
HBM JESD22-A114F exceeds 2000 V
MM JESD22-A115-A exceeds 200 V (C = 200 pF, R = 0 )
Multiple package options
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