74VHCT08D 查看數據表（PDF） - NXP Semiconductors.

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74VHCT08D

Quad 2-input AND gate

NXP Semiconductors. 

74VHC08; 74VHCT08

Quad 2-input AND gate

Rev. 01 — 30 June 2009

Product data sheet

1. General description

The 74VHC08; 74VHCT08 are high-speed Si-gate CMOS devices and are pin compatible

with Low-power Schottky TTL (LSTTL). They are specified in compliance with JEDEC

standard JESD7-A.

The 74VHC08; 74VHCT08 provide the quad 2-input AND function.

2. Features

I Balanced propagation delays

I All inputs have a Schmitt-trigger action

I Inputs accepts voltages higher than VCC

I Input levels:

N The 74VHC08 operates with CMOS logic levels

N The 74VHCT08 operates with TTL logic levels

I ESD protection:

N HBM JESD22-A114E exceeds 2000 V

N MM JESD22-A115-A exceeds 200 V

N CDM JESD22-C101C exceeds 1000 V

I Multiple package options

I Specified from −40 °C to +85 °C and from −40 °C to +125 °C

3. Ordering information

Table 1. Ordering information

Type number Package

Temperature range Name

Description

74VHC08D

74VHCT08D

−40 °C to +125 °C SO14

plastic small outline package; 14 leads;

body width 3.9 mm

74VHC08PW

74VHCT08PW

−40 °C to +125 °C

TSSOP14 plastic thin shrink small outline package; 14 leads;

body width 4.4 mm

74VHC08BQ

74VHCT08BQ

−40 °C to +125 °C

DHVQFN14 plastic dual in-line compatible thermal enhanced very

thin quad flat package; no leads; 14 terminals;

body 2.5 × 3 × 0.85 mm

Version

SOT108-1

SOT402-1

SOT762-1

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