EN80960SA 查看數據表（PDF） - Intel

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EN80960SA

EMBEDDED 32-BIT MICROPROCESSOR WITH 16-BIT BURST DATA BUS

Intel 

80960SA

4.0 WAVEFORMS

Figures 17, 18, 19, 20 and 21 show waveforms for various transactions on the 80960SA’s bus. Figure 22 shows

a cold reset functional waveform.

CLK2

Ta

Td

Tr

Ta

Td

Tr

CLK

ALE

AS

A31:16

A15:4,

D15:0

A3:1

BE1:0

BLAST

W/R

DT/R

DEN

VALID

VALID

ADDR

D

ADDR DATA

VALID

INVALID

VALID

READY

Figure 17. Non-Burst Read and Write Transactions Without Wait States

28

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